Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2008-09-08
2010-10-12
Lam, David (Department: 2827)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S194000, C365S233100, C365S233180
Reexamination Certificate
active
07813190
ABSTRACT:
An input circuit of a semiconductor memory device that prevents data from being input into a data input buffer prior to the enablement of the data input buffer. The input circuit includes an input buffer enabling control unit that generates an input buffer enabling signal which is enabled before a point at which data is input and which has an enabling period of at least a predetermined burst length. A data input buffer is controlled by the input buffer enabling signal, and the data input buffer buffers and outputs the data during the enabling period of the input buffer enabling signal.
REFERENCES:
patent: 5923595 (1999-07-01), Kim
patent: 6445642 (2002-09-01), Murakami
Hynix / Semiconductor Inc.
Ladas & Parry LLP
Lam David
LandOfFree
Input circuit of semiconductor memory device ensuring... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Input circuit of semiconductor memory device ensuring..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Input circuit of semiconductor memory device ensuring... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4228903