Input circuit of semiconductor memory device ensuring...

Details Input circuit of semiconductor memory device ensuring... Input circuit of semiconductor memory device ensuring...

2008-09-08

2010-10-12

Lam, David (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S194000, C365S233100, C365S233180

Reexamination Certificate

active

07813190

ABSTRACT:
An input circuit of a semiconductor memory device that prevents data from being input into a data input buffer prior to the enablement of the data input buffer. The input circuit includes an input buffer enabling control unit that generates an input buffer enabling signal which is enabled before a point at which data is input and which has an enabling period of at least a predetermined burst length. A data input buffer is controlled by the input buffer enabling signal, and the data input buffer buffers and outputs the data during the enabling period of the input buffer enabling signal.

REFERENCES:
patent: 5923595 (1999-07-01), Kim
patent: 6445642 (2002-09-01), Murakami

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