Input circuit and method for the operation thereof

Details Input circuit and method for the operation thereof Input circuit and method for the operation thereof

2004-07-07

2008-03-11

Cao, Chun (Department: 2115)

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

Using delay

C327S276000, C327S261000

Reexamination Certificate

active

07343507

ABSTRACT:
An input circuit (1′) provided with a time delay element (40), which circuit is capable of being tested by a controlled high level or low level connection, and a method for the operation thereof. The delay time of the time-delay element can be modified during operation of the input circuit. In particular, the elapsed delay time is read out prior to the testing of the input circuit and is restored again after testing, so that the test does not increase the effective input delay time for the process signals. In addition or as an alternative, the delay time is set to a minimum value prior to the test to enable rapid testing of the input circuit independent of the set delay time.

REFERENCES:
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patent: 5754071 (1998-05-01), Suh
patent: 5789969 (1998-08-01), Davis et al.
patent: 6137333 (2000-10-01), Williams et al.
patent: 6225840 (2001-05-01), Ishimi
patent: 6405228 (2002-06-01), Williams et al.
patent: 0 556 549 (1993-08-01), None

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