Input buffers and controlling methods for integrated circuit mem

Details Input buffers and controlling methods for integrated circuit mem Input buffers and controlling methods for integrated circuit mem

1998-06-01

2000-02-01

Tokar, Michael

Electronic digital logic circuitry

Interface

Supply voltage level shifting

326 70, H03K 190175

Patent

active

060207612

ABSTRACT:
An input buffer that can operate with Low Voltage Transistor-Transistor Logic (LVTTL) and with Stub Series Terminated transceiver Logic (SSTL) includes a differential amplifier that differentially amplifies a reference voltage and an external input signal. A switching system is coupled to the differential amplifier, to supply an external power supply voltage to the differential amplifier under SSTL operating conditions and to supply an internal power supply voltage to the differential amplifier under LVTTL operating conditions. An internal power supply voltage generator is responsive to the external power supply voltage, to generate the internal power supply voltage therefrom. The internal power supply voltage generator supplies the internal power supply voltage to the switching system. The switching system preferably includes a first switch that supplies the external power supply voltage to the differential amplifier in response to an SSTL control signal. A second switch supplies the internal power supply voltage to the differential amplifier in response to an LVTTL control signal.

REFERENCES:
patent: 5530379 (1996-06-01), Konishi et al.
patent: 5596291 (1997-01-01), Runas
patent: 5598122 (1997-01-01), McClure
patent: 5696456 (1997-12-01), Lee
patent: 5736871 (1998-04-01), Goto

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