Input buffer with hysteresis option

Details Input buffer with hysteresis option Input buffer with hysteresis option

2005-11-15

2005-11-15

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Signal level or switching threshold stabilization

C326S081000, C326S083000, C327S205000

Reexamination Certificate

active

06965251

ABSTRACT:
The invention provides a high-speed buffer that may used at the input of an integrated circuit, such as an input buffer. This buffer may be configured for use as a standard buffer with a single switching threshold, such as a TTL-to-CMOS buffer, or used as a Schmitt trigger with hysteresis, which as at least two switching thresholds. The integrated circuit may be a programmable logic device (PLD) or field programmable gate array (FPGA), but in other embodiments, the integrated circuit may be other types of devices such a microprocessors, ASICs, or memories.

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