Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2005-05-10
2005-05-10
Auduong, Gene N. (Department: 2818)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S230080
Reexamination Certificate
active
06891763
ABSTRACT:
Embodiments of the present invention are illustrated in a random access memory. In one embodiment, a random access memory comprises an array of memory cells, a write circuit, and an input buffer configured to receive data and pass the received data to the write circuit that writes the received data into the array of memory cells. The input buffer comprises a differential amplifier configured to receive the data and in response to the received data supply a first signal and a second signal that is the compliment of the first signal. The input buffer also comprises a first transistor configured to be controlled by the first signal and a second transistor configured to be controlled by the second signal. The first transistor and the second transistor are turned on to provide a current path through the first transistor and the second transistor to change the first signal in response to a transition in the received data.
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Auduong Gene N.
Dicke Billig & Czaja, PLLC
Infineon - Technologies AG
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