Input buffer of semiconductor memory device

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

326 84, G11C 700

Patent

active

055616348

ABSTRACT:
The present invention relates to an input buffer used in semiconductor memory devices and more particularly to an input buffer capable of operating at a high speed by using a BiCMOS (bi-complementary metal oxide semiconductor) circuit. In accordance with the present invention, there is provided an input buffer using a pull-up bipolar transistor and a pull-down bipolar transistor at an output side thereof, including a first device connected between an output terminal of the input buffer and a base of the pull-down bipolar transistor, for charging the base of the pull-down bipolar transistor to a predetermined first level, when potential of an external input signal is changed from a first state to a second state; and a second device connected between the output terminal of the input buffer and the base of the pull-down bipolar transistor, for charging the base of the pull-down bipolar transistor to a predetermined second level, after the potential of the external input signal is changed from a first state to a second state and the first device is at least activated.

REFERENCES:
patent: 5243237 (1993-09-01), Khieu

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