Input buffer circuit of a synchronous semiconductor memory...

Details Input buffer circuit of a synchronous semiconductor memory... Input buffer circuit of a synchronous semiconductor memory...

2005-01-25

2005-01-25

Nguyen, Tan T. (Department: 2818)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S222000

Reexamination Certificate

active

06847559

ABSTRACT:
The present invention discloses an input buffer circuit of a synchronous semiconductor memory device comprising a differential amplifier type input buffer and a low current type input buffer, wherein the differential amplifier type input buffer is operated in a normal mode, and the low current type input buffer is operated in a self-refresh mode, thereby decreasing the current flowing through the input buffer in the self-refresh mode. According to the input buffer of the synchronous semiconductor memory device, the current flowing through the input buffer in the self-refresh mode is very small, therefore the power consumption of the synchronous semiconductor memory device can be reduced.

REFERENCES:
patent: 6058063 (2000-05-01), Jang
patent: 6115322 (2000-09-01), Kanda et al.
patent: 6198689 (2001-03-01), Yamazaki et al.
patent: 6330679 (2001-12-01), Conary et al.
patent: 6433607 (2002-08-01), Kawasaki et al.
patent: 6771108 (2004-08-01), Kawasaki et al.

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