Input buffer circuit, integrated circuit device, semiconductor m

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

365226, 365233, G11C 1604, G11C 700, G11C 800

Patent

active

057936803

ABSTRACT:
An input buffer circuit includes a first amplifier causing a first change in an output signal by detecting a rising edge of an input signal, a second amplifier causing a second change in the output signal by detecting a falling edge of the input signal, and a feedback path feeding back the output signal as a feedback signal to the first amplifier and the second amplifier. The feedback signal controls the second amplifier such that a timing of the first change only depends on the first amplifier, and controls the first amplifier such that a timing of the second change only depends on the second amplifier.

REFERENCES:
patent: 5608687 (1997-03-01), Komarek et al.

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