Input buffer circuit capable of corresponding to variation of op

Electronic digital logic circuitry – Interface – Supply voltage level shifting

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Details

326 17, 326 71, 326 87, H03K 190175, H03K 1901

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active

055326200

ABSTRACT:
An input buffer circuit for converting a TTL(TTL:Transistor transistor logic) level signal supplied from an outside into an internal CMOS level signal. The input buffer circuit comprises a power voltage terminal supplied with a power voltage, a power voltage sensing signal generator for detecting a level of the power voltage by inputting as source power the power voltage supplied to the power voltage terminal and for outputting a power voltage sensing signal respondent to the detected level, and switching means for convening an external signal into an internal signal and for performing an switching operation in response to a level of the power voltage sensing signal positioned on an output path to output the convened signal.

REFERENCES:
patent: 4965469 (1990-10-01), Kondoh et al.
patent: 5343086 (1994-08-01), Fung et al.
patent: 5418476 (1995-05-01), Strauss
"Variable Vcc Design Techniques for Battery Operated DRAMs", 1992 Symposium on VLSI Circuits, pp. 110-111.

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