Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2008-01-15
2008-01-15
Nguyen, Tuan T. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S189200
Reexamination Certificate
active
07319620
ABSTRACT:
A pair of self-biased differential amplifiers having a non-symmetrical topology are combined to provide a self-biased differential amplifier having a symmetrical topology. Each of the combined differential amplifiers includes a pair of transistors coupled to each other as a current mirror. The current mirror transistors are coupled in series with a respective one of a pair of differential input transistors. A current source transistor is coupled to the differential input transistors, and it is self-biased by one of the current mirror transistors.
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Dorsey & Whitney LLP
Micro)n Technology, Inc.
Nguyen Tuan T.
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