Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2003-07-30
2009-02-17
Elamin, Abdelmoniem (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C413S064000, C413S064000, C413S064000, C413S064000, C413S064000, C413S064000, C413S064000, C712S218000
Reexamination Certificate
active
07493508
ABSTRACT:
This invention relates to an information processing apparatus as well as to an information processing method and a program for use therewith, the apparatus being arranged to prevent a drop in its processing performance while minimizing power dissipation when a frequency-variable synchronizing clock signal CLK of the apparatus is lowered in frequency. Illustratively, if a selector block31-2receives a selection command “select B” which is set depending on the frequency of the synchronizing clock signal CLK and which specifies the bypassing of a holding block12-2,then data input to and held by a holding block12-1on a first clock pulse of the clock signal CLK is arranged, on a second clock pulse, to pass through a selector block31-1and a signal processing block13-1, bypass the holding block12-2, pass through the selector block31-2and a signal processing block13-2, and be input to and held by a holding block12-3.This invention applies to data processing apparatuses such as CPUs, DSPs and filters as well as to buses.
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Elamin Abdelmoniem
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Sony Corporation
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