Information processing apparatus

Details Information processing apparatus Information processing apparatus

2008-05-06

2008-05-06

Shin, Christopher (Department: 2181)

Electrical computers and digital data processing systems: input/

Input/output data processing

Concurrent input/output processing and data transfer

C710S005000, C710S022000, C710S052000, C712S018000, C712S034000, C712S225000, C712S226000

Reexamination Certificate

active

07370123

ABSTRACT:
A descriptor queue composed of descriptors containing input address information that represents an address for storing data to be processed and output address information that represents an address for storing processed data is constructed and stored in a memory. A stream processor for performing a plurality of processes parallel to each other on the data to be processed acquires a descriptor from the memory, reads data to be processed from the memory according to the input address information contained in the descriptor, processes the data, and stores the processed data back into the memory according to the output address information contained in the descriptor.

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