Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2001-03-01
2003-07-29
Yoo, Do Hyun (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S173000, C711S147000
Reexamination Certificate
active
06601148
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to memory access in computer systems, and more specifically, how to control user access to particular areas of memory.
2. Description of Related Art
In a System Area Network (SAN), the hardware provides a message passing mechanism which can be used for Input/Output devices (I/O) and interprocess communications between general computing nodes (IPC). Consumers access SAN message passing hardware by posting send/receive messages to send/receive work queues on a SAN channel adapter (CA). The send/receive work queues (WQ) are assigned to a consumer as a queue pair (QP). The messages can be sent over five different transport types: Reliable Connected (RC), Reliable datagram (RD), Unreliable Connected (UC), Unreliable Datagram (UD), and Raw Datagram (RawD). Consumers retrieve the results of these messages from a completion queue (CQ) through SAN send and receive work completions (WC). The source channel adapter takes care of segmenting outbound messages and sending them to the destination. The destination channel adapter takes care of reassembling inbound messages and placing them in the memory space designated by the destination's consumer. Two channel adapter types are present, a host channel adapter (HCA) and a target channel adapter (TCA). The host channel adapter is used by general purpose computing nodes to access the SAN fabric. Consumers use SAN verbs to access host channel adapter functions. The software that interprets verbs and directly accesses the channel adapter is known as the channel interface (CI).
A Memory Region is an area of memory that is contiguous in the virtual address space and for which the translated physical addresses and access rights have been registered with the HCA. A Memory Window is an area of memory within a previously defined Memory Region, for which the access rights are either the same as or a subset of those of the Memory Region.
The normal method for controlling a consumer's access to an area of memory is to de-register and register a Memory Region. This process requires considerable overhead, including kernel intervention, in order to set up the access rights, pinning or unpinning of memory, and setting up the address translation tables. When more dynamic control of a consumer's access to memory is required, a different mechanism is needed. Currently, there is no method to dynamically control the access rights that a consumer is granted to an area of memory without changing the address translation associated with the Memory Region. The ability to dynamically change the access rights requires sequencing with respect to the Work Requests that are accessing the memory. In order to provide the sequencing and integrity of checking required, the requested changes to the access rights need to be checked in the HCA hardware.
Therefore, it would be desirable to have an efficient mechanism for providing both the sequencing and integrity checks for Memory Window management.
SUMMARY OF THE INVENTION
The present invention provides a method, system and program for controlling access to memory areas within a computer. The invention comprises placing a first Bind Work Queue Element (WQE) at the head of a work queue, wherein the first Bind WQE defines parameters associated with a first Memory Window. A set of Work Requests is then placed on the work queue, behind the first Bind WQE wherein the work requests invoke operations that access the first Memory Window. A second Bind WQE is then placed on the work queue, behind the first set of Work Requests. This second Bind WQE defines parameters associated with a second Memory Window. A second set of Work Requests is placed on the work queue behind the second Bind WQE and invoke operations that access the second memory window.
The Memory Windows can be associated with a common Memory Region and have different addresses and lengths or different access rights. In another embodiment, the first and second Memory Windows can be associated with different Memory Regions.
REFERENCES:
patent: 5437031 (1995-07-01), Kitami
patent: 5574849 (1996-11-01), Sonnier et al.
patent: 5915088 (1999-06-01), Basavaiah et al.
patent: 6314501 (2001-11-01), Gulick et al.
Beukema Bruce Leroy
Craddock David F.
Fuhs Ronald Edward
Gregg Thomas Anthony
Recio Renato John
McBurney Mark E.
Moazzami Nasser
O'Hagan Christopher P.
Yee Duke W.
Yoo Do Hyun
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