Incorporation of dielectric layers in a semiconductor

Details Incorporation of dielectric layers in a semiconductor Incorporation of dielectric layers in a semiconductor

1990-04-25

1992-05-05

Bowers, Jr., Charles L.

Radiation imagery chemistry: process, composition, or product th

Imaging affecting physical property of radiation sensitive...

Making electrical device

430313, 430314, 430316, 430317, 427 96, 427 99, 156643, 437228, G03C 500

Patent

active

051107120

ABSTRACT:
A system for integrating a composite dielectric layer in an integrated circuit to facilitate fabrication of a high density multi-level interconnect with external contacts. The composite dielectric layer comprises of a polymer layer which normally comprises a polyimide that is deposited using conventional spin-deposit techniques to form a planarized surface for deposition of an inorganic layer typically comprising silicon dioxide or silicon nitride. The inorganic layer is etched using standard photoresist techniques to form an inorganic mask for etching the polymer layer. A previously deposited inorganic layer functions as an etch stop to allow long over etches to achieve full external contacts which, in turn, allows high density interconnect systems on multiple levels.

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Yutaka Misawa et al., "A New Multilevel Interconnection System for Submicrometer VLSI's Using Multilayered Dielectrics of Plasma Silicon Oxide and Low-Thermal-Expansion Polyimide", IEEE Transactions on Electron Devices, vol. ED-34, No. 3, Mar. 1987, pp. 621-627, Fig. 1; p. 622, left-hand column, chapter III.B, Fabrication Process.
IBM Technical Disclosure Bulletin, "Via Hole Etch Process Through a Polyimide/Nitride Composite Layer", vol. 27, No. 11, Apr. 1985, pp. 6783-6784, New York, U.S., whole article.

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