Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-03-07
2002-05-07
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S638000, C438S435000, C324S719000, C257S190000
Reexamination Certificate
active
06383874
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to a device stack for isolation structure fabrication and to methods of fabricating the same.
2. Description of the Related Art
The fabrication of electrical isolation structures, such as trench-based isolation structures, involves the sequential masking and etching of selected portions of a semiconductor substrate to establish therein a pattern of trenches in which bulk insulating material will be later deposited. Most trench etching processes involve rather lengthy plasma-based etching techniques that present the potential to significantly damage the portions of the underlying silicon substrate in which active circuit devices will be later fabricated. Accordingly, conventional trench-based isolation structure fabrication techniques normally include the fabrication of a pad oxide layer on the substrate surface and a relatively thick silicon nitride layer on top of the pad oxide layer. The purpose of the pad oxide and silicon nitride layers are twofold. First, the pad oxide layer provides a first film of protection over the silicon substrate. Oxide is usually selected for this role since oxide films exhibit better adhesion to silicon than do silicon nitride films. The silicon nitride protective layer exhibits relatively good adhesion to underlying oxide and, more importantly, is relatively resistant to chemical mechanical polishing (“CMP”) of the later-deposited bulk insulating material, and thus provides a rather robust film to protect the underlying substrate during planarization. Both films protect the substrate from unintentional etching during trench formation.
In conventional processing, the oxide-nitride stack involves the first thermal oxidation or chemical vapor deposition (“CVD”) of the oxide film followed by a CVD formation of the silicon nitride film. Many conventional processes utilize a thermal oxidation in order to provide the protective oxide film. This, of course, entails a high temperature process in either a rapid thermal processing context or a more conventional diffusion tube furnace process. In either case, some thermal budget is consumed and the integrity of the Si—SiO
2
interface is stressed to a certain extent. This may or may not be significant, depending upon the existing character of the interface. For example, if nitrogen has been introduced into the Si—SiO
2
interface, the thermal steps associated with oxide formation may degrade the quality of the nitrogen dispersal at the interface.
During development of the etched mask resist, standing waves may result in so-called “footing” in the edges of the patterned resist openings. In order to suppress the effects of standing waves, one conventional fabrication process modifies the optical properties of the silicon nitride film by depositing the silicon nitride film in a two-step process. In the first stage, low pressure CVD (“LPCVD”) is used to establish the majority of the thickness of the nitride film. Thereafter, a silicon rich nitride film is established on the LPCVD nitride film, again by LPCVD, albeit with altered flow rates for silicon source and nitrogen source gases. The use of LPCVD again is a relatively high temperature process and thus consumes thermal budget. Furthermore, the LPCVD silicon nitride film, while having better optical properties than a comparable nonsilicon rich film, nevertheless tends to form with higher stresses than a plasma enhanced CVD (“PECVD”) nitride film. Furthermore, the optical, that is, anti-reflective coating properties associated with the conventionally formed silicon rich nitride film seldom completely alleviate standing wave effects.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.
SUMMARY OF THE INVENTION
In accordance with one aspect of the present invention, a method of processing a substrate is provided that includes exposing the substrate to a plasma ambient containing nitrogen and oxygen to form a nitrogen containing interface. An oxide film is formed on the nitrogen containing interface and a silicon rich nitride film is formed on the oxide film. The silicon rich nitride film is exposed to a plasma ambient containing oxygen to convert an upper portion of the silicon rich nitride film to silicon oxynitride.
In accordance with another aspect of the present invention, a method of processing a substrate is provided that includes exposing the substrate to a plasma ambient containing nitrous oxide to form a nitrogen containing interface. An oxide film is formed on the nitrogen containing interface and a silicon rich nitride film is formed on the oxide film by plasma enhanced chemical vapor deposition. The silicon rich nitride film is exposed to a plasma ambient containing oxygen to convert an upper portion of the silicon rich nitride film to silicon oxynitride. A mask is formed on the silicon rich nitride film and an etch is performed through the silicon rich nitride film and the oxide film and into the substrate to form a trench therein.
In accordance with another aspect of the present invention, a circuit device is provided that includes a semiconductor substrate that has an upper surface with a nitrogen containing interface and a stack. The stack has an oxide film positioned on the nitrogen containing interface, a silicon rich nitride film positioned on the oxide film and an oxynitride film positioned on the silicon rich nitride film.
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U.S. application No. 09/875,681, Sey-Ping Sun et al., filed Jun. 6, 2001.
Christopher P. D'Emic et al.; Deep trench plasma etching of single crystal silicon using SF6/O2gas mixtures; Journal of Vacuum Science & Technology B, pp. 1105-1111; May/Jun. 1992.
The University of Reading, Substrate Optical Properties—http://www.cyber.reading.ac.uk/ISP/infrared/technical_data/substrate_optical_pro. . . /, pp. 1-8; 1996.
Anderson Robert W.
Gardner Mark I.
Sun Sey-Ping
Honeycutt Timothy M.
Luk Olivia T
Niebling John F.
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