In situ, one step, formation of selective hemispherical grain si

Details In situ, one step, formation of selective hemispherical grain si In situ, one step, formation of selective hemispherical grain si

1998-09-10

2000-10-03

Dutton, Brian

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438253, 438254, 438396, 438238, H01L 218242

Patent

active

061272213

ABSTRACT:
A process for creating a DRAM capacitor structure, comprised of a storage node electrode, featuring an HSG silicon layer, on the surface of the storage node electrode, used to increase capacitor surface area, has been developed. The process features the use of a UHV system, allowing: a pre-clean procedure; an HSG seeding procedure; an anneal procedure used to create an HSG silicon layer; and a silicon nitride deposition; all to be performed in situ, without exposure to air, thus removing, and avoiding, unwanted native oxide layers. This invention allows a nitride--oxide, capacitor dielectric layer, to be formed in situ, in the UHV system, on an underlying storage node electrode structure, which in turn experienced in situ procedures, in the UHV system, resulting in HSG silicon layer, formed after an in situ, pre-clean, an HSG silicon seeding procedure, and an anneal procedure.

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