Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
1996-07-31
2001-03-06
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S764000, C134S001300
Reexamination Certificate
active
06197694
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the fabrication of semiconductor devices. More particularly, this invention relates to a method for cleaning a silicon surface to remove native oxides and other contaminants in situ and then forming a layer, such as a layer of polysilicon or a layer of oxide, over the cleaned silicon surface in the same chamber.
2. Description of the Related Art
During the fabrication of semiconductor devices on silicon wafers, various structures are formed on a silicon substrate. The quality of the semiconductor device is a function of the accuracy with which these structures are formed, as well as the cleanliness of the environment in which the semiconductor device is processed. As device geometries become smaller, for example, using submicron design rules, impurities and contaminants exact an unacceptable toll on semiconductor device per wafer yields.
A critical step during the process of fabricating certain semiconductor devices involves depositing a layer of polysilicon on the silicon substrate. In current practice, such deposition is commonly accomplished through use of a low pressure chemical vapor deposition (LPCVD) process. In the LPCVD process, a source of silicon-containing gas, such as, for example, silane or disilane, is provided to a chamber containing one or more silicon wafers having a silicon surface on which a polysilicon layer is to be deposited. The gas mixture flowing into the chamber may also include one or more gases containing dopants such as phosphorus, boron, or arsenic. Examples of such dopant gases include phosphine, arsine, diborine, tertiary butyl phosphine, tertiary butyl arsenic. The silicon wafers are then heated to a deposition temperature, and the gases are fed into the chamber where they are decomposed, thereby depositing a polysilicon layer on the surface of the silicon water.
A common practice is to deposit a polysilicon layer onto a silicon substrate in one or more low pressure chambers as part of a time-consuming sequence of processing steps. In the prior art LPCVD system illustrated in
FIG. 1
, a chamber
10
received a boat
11
that contains a plurality of silicon wafers
12
. A gas fed into chamber
10
from gas source
13
is controlled by a flow controller
14
. The gas enters chamber
10
from gas inlet port
15
and flows across wafer
12
in the direction indicated by the arrows in the Figure. A low pressure, i.e. a pressure of about 300 milliTorr, is maintained in chamber
10
by exhaust system
16
. Three separately controlled heater elements
17
are included in the system to provide localized temperature variations within chamber
10
that compensate for localized variations in reactant gas concentrations within chamber
10
.
Another prior art batch-type LPCVD chamber is illustrated treated in
FIG. 2. A
plurality of wafers
21
are stacked vertically within the chamber. Reactant gases are injected into the chamber through a plurality of apertures
23
formed in a gas injector
22
. Gas injector
22
is conventionally situated between two rows of wafers
21
.
Unfortunately, however, the use of such prior art chambers also encourages the growth of native oxides and other contaminants. Native oxides may also be formed on the wafer surface during prior processing steps which expose the wafers to ambient conditions. Some prior art processes include various cleaning steps prior to deposition of polysilicon, or growth of an oxide layer, but the cleaned wafers are usually still exposed to the ambient atmosphere after such cleaning, and native oxides therefore have the opportunity to grow on the wafer surface prior to the polysilicon deposition or oxide growth step.
Handling of multiple wafers, e.g. in a wafer boat, at multiple processing stations during the semiconductor device fabrication process is a particularly acute problem with regard to the formation of native oxides, or the introduction of other impurities to the wafer surfaces. The wafers take significant time to load into the chamber—on the order of thirty minutes,. During the loading step, air is present around and about the wafers and, therefore, a native oxide layer may readily form on the newly cleaned silicon surface of the wafer. This problem is exacerbated by the fact that such native oxide forms in a nonuniform manner, i.e., the first wafer in the chamber may grow a thicker layer of native oxide. This can result in a batch of integrated circuit structures having different electrical properties depending on the particular wafer upon which the integrated circuit structures were formed.
To achieve acceptable semiconductor device yield per silicon wafer in those applications where a polysilicon layer is deposited (or an oxide layer grown) on a silicon surface of the wafer, the silicon surface of the wafer must be absolutely free of contaminants and impurities, such as native oxides, before forming the desired layer thereon. Otherwise, such contaminants and impurities present at the interface between the silicon surface of the wafer and the layer formed thereover may interfere with the electrical properties of the integrated circuit structures therein, resulting, for example, in device noise, degraded performance, or even total failure of the integrated circuit structure.
The formation of native oxide and the presence of various contaminants on the silicon surface of a wafer becomes an increasingly serious problem as device geometries become smaller. Since such native oxides form randomly on the silicon surface of the wafer, control and reproducibility during the semiconductor device fabrication process are degraded.
Native oxides also present a serious problem, for example in bipolar emitter technology, where a very thin (e.g., 20 Angstroms), but uniform, oxide layer is to be grown on the silicon surface of the wafer; as well as inhibiting effective polysilicon deposition. That is, very thin and uniform oxide layers as are required, for example, in submicron semiconductor device structures, cannot be predictably produced when random native oxide is already present on the underlying silicon surface. Rather, an intentionally grown oxide layer over such native oxides will have undesired raised or thick portions at points where native oxides are present on the wafer surface beneath the grown oxide layer. Additionally, such native oxides may include various contaminants. Therefore, the formation of a high quality oxide layer on a silicon surface is degraded when such native oxides are present.
SUMMARY OF THE INVENTION
The present invention is a method for providing a clean interface between a single crystal silicon wafer substrate and a deposited polysilicon layer. A silicon wafer is initially processed under pressure on the order of 5-100 Torr and in the presence of hydrogen as a reactant gas in a single wafer chamber at a temperature in the range of 800° to 950° C. The hydrogen gas supplied to the chamber removes native oxides and other contaminants from the surface of the wafer at this temperature. After removal of native oxide is effected, typically 0.5 to 4.0 minutes of hydrogen gas processing, the temperature is lowered to about 650° C., at which point a polysilicon layer may be deposited on the substrate. The substrate/deposited layer interface thus formed is of exceptional quality and is readily controlled at submicron geometries with great accuracy and reproducibility. Because all processing occurs in situ, i.e. in the same chamber, handling is minimized, thereby eliminating the possibility of introducing contaminants to the process and also significantly reducing processing time.
In another embodiment of the invention, an oxide layer, which may comprise a very thin oxide layer, may be grown on the newly cleaned silicon surface of the wafer in the same chamber after the native oxide and other contaminants are removed therefrom. The resulting grown oxide layer, even if very thin, will be uniform due to the absence of native oxides beneath the grown oxide layer.
REFERENCES:
patent: 3903325 (1975-09-
Applied Materials Inc.
Blakely & Sokoloff, Taylor & Zafman
Bowers Charles
Kieler Eric D.
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