Implementing enhanced LBIST testing of paths including arrays

Details Implementing enhanced LBIST testing of paths including arrays Implementing enhanced LBIST testing of paths including arrays

2008-01-16

2010-11-30

Trimmings, John P (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S718000, C714S030000, C714S025000, C714S733000, C714S726000, C714S727000, C714S728000, C714S729000, C714S732000, C714S734000, C714S735000, C714S736000, C714S738000, C714S739000

Reexamination Certificate

active

07844869

ABSTRACT:
A method and circuit implement testing of a circuit path including a memory array and logic including Logic Built in Self Test (LBIST) diagnostics, and a design structure on which the subject circuit resides are provided. Testing of the circuit path includes initializing the memory array in the circuit path with an initialization pattern, switching to Logic Built in Self Test (LBIST) mode and providing a read only mode for the memory array, and running Logic Built in Self Test (LBIST) testing of the circuit path.

REFERENCES:
patent: 2005/0097418 (2005-05-01), Anzou et al.
patent: 2006/0080584 (2006-04-01), Hartnett et al.
patent: 2006/0156090 (2006-07-01), Bushard et al.

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