Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2008-10-13
2011-12-27
Gaffin, Jeffrey A (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S733000
Reexamination Certificate
active
08086924
ABSTRACT:
A method, apparatus and computer program product are provided for implementing diagnostics of transitional scan chain defects using structural Logic Built In Self Test (LBIST) test patterns. A LBIST test pattern is applied to the device under test and multiple system clock sequences with variable loop control are applied in a passing operating region and scan data is unloaded. The LBIST test pattern is applied to the device under test and multiple system clock sequences with variable loop control are applied in a failing operating region for the device under test and scan data is unloaded. Then the unload data from the passing operating region and the failing operating region are compared. The identified latches having different results are identified as potential AC defective latches. The identified potential AC defective latches are sent to a Physical Failure Analysis system.
REFERENCES:
patent: 3761695 (1973-09-01), Eichelberger
patent: 5764655 (1998-06-01), Kirihata et al.
patent: 5983380 (1999-11-01), Motika et al.
patent: 6308290 (2001-10-01), Forlenza et al.
patent: 6996760 (2006-02-01), Dorsey
patent: 7020842 (2006-03-01), DeStefano et al.
patent: 7395469 (2008-07-01), Anderson et al.
patent: 7434130 (2008-10-01), Huisman et al.
patent: 2003/0036869 (2003-02-01), Huisman et al.
patent: 2004/0230882 (2004-11-01), Huott et al.
patent: 2005/0138514 (2005-06-01), Burdine et al.
patent: 2010/0095169 (2010-04-01), Forlenza et al.
patent: 2008082888 (2008-04-01), None
B. Konemann, J. Mucha, G. Zwiehoff, “Built-In Test for Complex Integrated Circuits”, IEEE Journal of Solid State Circuits vol. SC-15, pp. 315-318, Jun. 1980.
G. A. Sarrica, B. R. Kessler “Theory and Implementation of LSSD Scan Rind & STUMPS Channel Test and Diagnosis”, Sep. 28-3-, 1992, Electronics Manufacturing Technology Symposium, 1992I, Thirteenth IEEE/CHMT International, pp. 195-200.
R. Guo, S. Venkataraman, A Technique for Fault Diagnosis of Defects in Scan Chains, IEEE, paper 10.2, 2001 pp. 268-277, USA.
I. Bayraktaroglu et al., “Gate Level Fault Diagnosis in Scan-Based BIST,” Proceedings of the 2002 Design Automation and Test in Europe Conference, 1530-1591/02 IEEE.
Makar, S. R.; McCluskey, E.J.; , “Functional tests for scan chain latches,” Test Conference, 1995. Proceedings., International, vol., No., pp. 606-615, Oct. 21-25, 1995 doi: 10.11 09/Test.1995.529889 URL: http://ieeexplore.ieee.org/stamp/stamp.jsp ?tp=&arnu mber=529889&isnu mber= 11 600.
Maka, S.R.; McCluskey, E.J.; , “ATPG for scan chain latches and flip-flops,” VLSI Test Symposium, 1997., 15th IEEE, vol., No., pp. 364-369, Apr. 27-May 1, 1997 doi: 10.11 09IVTEST.1997.600306 U RL: http://ieeexplore.ieee.org/stamp/stamp.jsp ?tp=&arnu mber=600306&isnu mber= 13046.
Ruifeng Guo; Venkataraman, S.; , “A technique for fault diagnosis of defects in scan chains,” Test Conference, 2001. Proceedings. International, vol., No., pp. 268-277, 2001 doi: 10.11 09/Test.2001.966642 URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=966642&isnumber=20866.
Yu Huang; Wu-Tung Cheng; Cheng-Ju Hsieh; Huan-Yung Tseng; Alou Huang; Yu-Ting Hung; , “Intermittent scan chain fault diagnosis based on signal probability analysis,” Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings, vol. 2, No., pp. 1072-1077 Vo1.2, Feb. 16-20, 2004 doi: 10.11 09IDATE.2004.1269035.
Forlenza Donato Orazio
Forlenza Orazio Pasquale
Tran Phong T
Gaffin Jeffrey A
Gandhi Dipakkumar
International Business Machines - Corporation
Pennington Joan
LandOfFree
Implementing diagnosis of transitional scan chain defects... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Implementing diagnosis of transitional scan chain defects..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Implementing diagnosis of transitional scan chain defects... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4300937