Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-03-15
2011-03-15
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000, C438S262000, C438S528000
Reexamination Certificate
active
07906394
ABSTRACT:
In FLASH EPROM cells, source diffusion continuity between horizontal and vertical source lines is provided by an arsenic implant under the stack in vertical source lines.
REFERENCES:
patent: 5659500 (1997-08-01), Mehrad
patent: 5858839 (1999-01-01), Kaya et al.
patent: 6043122 (2000-03-01), Liu et al.
patent: 6072212 (2000-06-01), Kaya et al.
patent: 6243293 (2001-06-01), Van Houdt et al.
patent: 6312989 (2001-11-01), Hsieh et al.
Mehrod Freidoon
Picone Kyle A.
Brady III Wade J.
Lebentritt Michael S.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
LandOfFree
Implanted vertical source-line under straight stack for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Implanted vertical source-line under straight stack for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Implanted vertical source-line under straight stack for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2651036