Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – With lattice constant mismatch
Reexamination Certificate
1999-03-08
2001-11-20
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
With lattice constant mismatch
C257S200000, C257S013000, C257S015000, C257S097000
Reexamination Certificate
active
06320208
ABSTRACT:
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a layer structure of a II-VI compound semiconductor device.
(b) Description of the Related Art
III-V compound semiconductors made from group III elements, such as Al, Ga and In, and group V elements such as As, P and Sb, are conventionally used for semiconductor lasers covering wavelengths from infrared ray to red color range and for light emitting diodes covering wavelengths from yellow to green color range. Wider range of bandgaps must be realized if a smaller wavelength of emission is desired which III-V compound semiconductors can hardly achieve.
On the other hand, II-VI compound semiconductors made from group II elements, such as Be, Zn, Cd and Mg, and group VI elements, such as S, Se and Te, exhibit comparatively large bandgaps and can emit light of almost all wavelengths within visible range to human eye. Recently, extensive R&D efforts have been made to achieve light emitting device materials covering particularly from green color to ultraviolet range.
Due to unavailability of high quality crystal structure of the II-VI compound in a bulk substrate, a bulk crystal wafer made from III-V compound materials in high quality is generally used as a substrate for the fabrication of the II-VI compound semiconductors. Among them, GaAs substrate having a lattice constant close to that of ZnSe, one of II-VI compound semiconductors, is most widely used for the fabrication of II-VI compound semiconductor light emitting devices, just because double heterostructure can be formed under the lattice matching condition by using mixed crystals such as ZnSSe and MgZnSSe.
In the II-VI compound laser diodes fabricated on the above GaAs substrate, however, due to the presence of crystal defects or misfit dislocations in II-VI compound semiconductors, the laser diodes are quickly deteriorated during operation thereof to retard a longer lifetime and a higher output power (See, for example, Appl. Phys. Lett. Vol.65, 1331 Page, 1994).
It is generally known that a crystal defect generated in the interface between a II-VI compound and a III-V compound (referred to as II-VI/III-V interface, hereinafter) easily grows to a three dimensional growth once Ga and Se, or Ga and S, are coupled to form the crystal defect. It is, therefore, important to control the II-VI/III-V interface for attaining a high quality crystal growth of II-VI compound thin layers.
FIG. 1
shows a conventional layer structure of II-VI compound semiconductor devices formed on a GaAs substrate
11
by MBE (Molecular Beam Epitaxy) technique. In order to grow the II-VI compound active layer on the GaAs substrate, first, a native oxide film formed on the GaAs substrate surface is removed by an As molecular beam in a growth chamber for growing III-V compound semiconductor (referred to as III-V compound growth chamber, hereinafter), which is interconnected with II-VI compound growth chamber by a vacuum conveyer. Subsequently, to reproduce the flatness of the substrate surface, a GaAs buffer layer
14
is grown, then the outermost surface of the GaAs buffer layer
14
is terminated with As atoms. After a GaAs buffer layer
14
is grown thereon, the resultant wafer is conveyed to the II-VI compound growth chamber. Thereafter, the substrate temperature is increased while the reconstruction pattern of As surface is observed using a reflection high-energy electron diffraction, to formulate the reconstruction pattern of 2×4 wherein the As coverage of around 75% is attained. The substrate temperature is then kept at 280° C., which is suited for growing a II-VI compound semiconductor thin film, while irradiating a group II molecule beam, to thereby start growth of a ZnSe buffer layer
16
. During the step, the initial several atomic layers are grown under an excess group II condition to thereby suppress the coupling between Ga and Se, or Ga and S (See for example, Appl. Phys. Lett. Vol.68, Page 2,828, 1996).
In the conventional method, it is difficult in practice to prevent the coupling beween Ga and Se, or Ga and S perfectly, whereby GaAs wafer surface is contaminated by S or Se remaining in the II-VI compound growth chamber (See for example, Appl. Phys. Lett. Vol.68, Page 2,828, 1996). Further, due to the variation in the As coverage within the wafer surface, there is a problem in uniformity and reproducibility of defect density within the wafer surface, which retards fabrication of a highly efficient II-VI semiconductor optical device with a longer lifetime.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a highly uniform and high quality layer structure of a II-VI compound semiconductor device having a longer lifetime and a high output power.
The present invention provides, as an embodiment thereof, a II-VI compound semiconductor device comprising a GaAs substrate, at least one first layer made of III-V compound semiconductor formed on the GaAs substrate, the at least one first layer including an In-containing layer containing In as a constituent element thereof, the at least one first layer as a whole having a thickness lower than a critical thickness allowing coherent growth, and a second layer made of II-VI compound semiconductor formed on the at least one first layer.
In accordance with the present invention, high quality II-V compound semiconductor layer is obtained having a reduced defect density in the II-VI/III-V interface by the function of the III-V compound semiconductor layer containing In as a constituent element and formed between the GaAs buffer layer and the II-VI compound semiconductor layer.
The above and other objects, features and advantages of the present invention will be more apparent from the following description, referring to the accompanying drawings.
REFERENCES:
patent: 5548137 (1996-08-01), Fan et al.
patent: 5732098 (1998-03-01), Nisitani et al.
Crane Sara
Hayes, Soloway, Hennessey Grossman & Hage, P.C.
NEC Corporation
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