Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-01-23
2004-09-28
Jackson, Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S341000, C257S578000, C257S579000, C257S580000, C257S592000, C257S401000, C257S139000
Reexamination Certificate
active
06798019
ABSTRACT:
BACKGROUND
Insulated gate bipolar transistors (IGBTs) are popular control devices for automobile ignition systems. The IGBT can carry large currents with very low resistance and can be rapidly switched on and off with a low voltage gate. They combine the control characteristics of DMOS devices with the current carrying capacity of thyristor.
A typical IGBT is shown in
FIG. 4
a
. Those skilled in the art understand that some IGBTs are formed in striped cellular arrays of bases with sources. As shown in
FIG. 4
a
, the IGBT
10
has an epitaxial layer
11
that includes two N+ source stripes regions
2
a
,
2
b
surrounded by P-typed base stripe regions
3
. The portion
3
a
of the base
3
that lies between the source stripes is designated as the body stripe. The epitaxial layer
11
has a lightly doped N drift region
5
over a heavily doped N buffer region
7
. The epitaxial layer
11
is formed on top of a heavily P doped substrate
9
. On top of the device, gate insulating stripes
17
, typically of silicon dioxide, cover the top of the epitaxial layer
11
. Gate conductive stripes
19
, typically polysilicon
19
, cover the insulating stripes
17
and form a gate electrode. The gate overlies channel stripes
30
a
,
30
b
on opposite sides of the base stripe
3
. Another insulating layer
21
covers the polysilicon stripes
19
and a metal contact stripe
23
contacts the source stripes
2
a
,
2
b
, N+ source contact regions
20
and the body stripe
3
a
of each cell. The above description is for a planar device with the gate on the surface. However, the IGBT may be fabricated with a trench gate. See
FIG. 4
b.
IGBTs may be used in ignition control circuits such as those shown in
FIGS. 1 and 2
. Those circuits are discussed in this Background portion of the specification in order to explain the invention. The location of that discussion and the discussion itself are not admissions that the circuits are prior art. When the IGBT
10
is on, it drops a low voltage V
CE(sat)
and current flows through the primary side
12
of transformer
14
. The ratio of the primary to the secondary coil
16
is about 100:1. The voltage is allowed to build to about 400 volts across the primary. When the spark plug is triggered, most of the energy is discharged in the spark. If there is any residual energy, it is dissipated by an auxiliary clamp circuit
80
. In
FIG. 1
the clamp circuit
80
a
is a single pair or multiple pairs of Zener diodes
82
,
84
with a cumulative breakdown voltage of about 400 volts. In
FIG. 2
the clamp circuit
80
b
is a voltage divider including resistors R
1
, R
2
and a single pair or multiple pairs Zener diodes
86
. After the gate signal is removed, auxiliary circuits
80
keep the IGBT
10
on in order to dissipate residual energy and prevent a localized failure.
The voltage for the auxiliary circuits
80
is set by the zener diodes to dissipate the energy over time. A problem arises if there is no spark due to, for example, a broken spark plug wire or a fouled plug. That leaves an open secondary
16
and the energy remains stored in the inductors
12
,
16
. With the gate turned off, the energy stored in the primary
12
cannot be transferred to the secondary
16
. The primary
12
forces the voltage to rise until the zeners break down. In the self clamped inductive switching (SCIS) mode a portion of the collector current, Izener, is diverted from the collector and into the gate to keep the IGBT on. Then energy stored in the primary inductor
12
will dissipate even after the gate signal is removed.
In the SCIS mode the IGBT must absorb all the energy stored in the ignition coil during abnormal operating conditions. The most common abnormal condition is an open secondary. The silicon area of the IGBT is defined by its SCIS energy density capability. Therefore, it is imperative that the SCIS energy density (mJ/cm
2
) be increased because shrinking the silicon area reduces cost and the IGBT footprint is reduced to free up module space. A 60% reduction in the footprint can be realized by offering the same SCIS capability in the DPak (TO-252) rather than a D2Pak (TO-263). Supplying the same device performance in a DPak allows the module designer to add this functionality without increasing the module size.
In the clamping phase of the SCIS mode, a portion of the collector current is fed back to the gate after the diodes in
FIGS. 1 and 2
avalanche. This current develops the required gate plateau voltage V
GE(plateau)
across the R
GE
or R
2
to deliver the necessary p-n-p base electron current required to conduct the total decaying current from the energy stored in the primary coil at the clamping voltage. See FIG.
3
. The V
GE(plateau)
continually self adjusts because it is a function of the IGBT threshold voltage (V
th
), p-n-p current gain (&agr;
p-n-p
), Pbase leakage current, and channel mobility (&mgr;
ns
). All of the above are a function of the device temperature. So V
GE(plateau)
decreases with temperature because of the following factors:
1. The V
th
voltage has a negative temperature coefficient.
2. The &agr;
p-n-p
has a positive temperature coefficient, reducing the percentage of electron current to deliver the total decaying SCIS current.
3. The electron current generated from the Pbase leakage current has a positive temperature coefficient. Refer to stripe cell cross-section shown in FIG.
4
. This reduces the amount of electron current required to drift across the channel because the leakage current can supply part of the p-n-p base current.
V
GE(plateau)
increases with temperature because the degradation in &mgr;
ns
with increasing temperature causes a de-biasing effect.
Factors 1, 2, and 3 outweigh factor 4. So as the device
10
heats up and current decays V
GE (plateau)
will decrease at an accelerated rate. If V
GE (plateau)
reaches zero anywhere on the die while the temperature is still rising and an appreciable amount of current (>1A) is still decaying from the primary to induce localized thermal runaway, the device will fail to maintain the clamping function and may fail destructively. As such, it is desirable to find a solution for keeping V
GE(plateau)
high during SCIS clamping.
Others have tried to extend the SCIS capability by decreasing the cell pitch to more uniformly distribute the heating during SCIS by reducing the localized current density. In some designs the cell is full channel and N+ channel doping is contacted along the entire length of the stripe as showed in FIG.
5
. With such designs, V
GE
(plateau) during SCIS is reduced because the electron current density per unit channel width is reduced. Thus, such designs fail to improve SCIS performance. Another design to improve SCIS performance relies upon dividing the channel width into multiple segments as shown in FIG.
6
. The channel width is reduced by excluding the N+ channel doping. This can be accomplished by a simple lithographic bar pattern with the results shown in the bottom half of FIG.
6
. The N+ doping need not be continuous across the contact opening as shown in the top half of FIG.
6
. The segments of the channel can be connected in their centers or at their ends. See the versions showed in
FIGS. 7 and 8
. In both figures, contact is made again along the full length of the N+ channel doping. The N+ contact areas are not required, nor must they be continuous across the contact opening. These methods increase V
GE(plateau)
and the electron current density per unit channel width. The higher electron current per unit channel width increases the maximum peak temperature before all the IGBT p-n-p base current can be supplied by the increasing Pbase leakage current.
SUMMARY
The invention improves SCIS performance by altering the structure of the source contact regions and by altering the structure of the sources. In particular, channel resistances are added to the device in order to more effectively distribute the heat across the surface of the die. The construction of the IGBT is altered so that contact
Baran Robert D.
Czeck Bernard J.
Lange Douglas
Reichl Dwayne S.
Wojslawowicz Jack E.
Fairchild Semiconductor Corporation
FitzGerald Esq. Thomas R.
Jackson Jerome
Landau Matthew C
Roach, Esq. Laurence S.
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