Identifying bitstream load issues in an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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C714S798000, C714S742000, C324S762010, C326S038000, C326S039000

Reexamination Certificate

active

07966534

ABSTRACT:
A method of detecting an error when loading a programmable integrated circuit (IC) can include detecting a predetermined bit pattern indicating a start of a bitstream within the programmable IC, starting a timer within the programmable IC responsive to detecting the predetermined bit pattern, and determining whether a bitstream load complete condition has occurred prior to expiration of the timer. When the timer expires prior to an occurrence of the bitstream load complete condition, at least one recovery action can be implemented.

REFERENCES:
patent: 7030647 (2006-04-01), White et al.
patent: 7375551 (2008-05-01), White et al.
patent: 7710147 (2010-05-01), White et al.
patent: 2010/0020830 (2010-01-01), Ambilkar et al.

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