Active solid-state devices (e.g. – transistors – solid-state diode – With specified dopant – Deep level dopant
Patent
1997-02-26
1999-11-30
Hardy, David B.
Active solid-state devices (e.g., transistors, solid-state diode
With specified dopant
Deep level dopant
257913, H01L 2936
Patent
active
059947616
ABSTRACT:
A process for heat-treating a single crystal silicon wafer to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step. The wafer has a front surface, a back surface, a central plane between the front and back surfaces, and a sink for crystal lattice vacancies at the front surface. In the process, the wafer is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The wafer is then cooled from the temperature of said heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the crystal lattice vacancy sink to produce a wafer having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the wafer.
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Cornara Marco
Falster Robert
Gambaro Daniela
Olmo Massimiliano
Hardy David B.
MEMC Electronic Materials SpA
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