Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
2008-12-08
2010-02-02
Smoot, Stephen W (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
C257SE21524, C324S765010
Reexamination Certificate
active
07655946
ABSTRACT:
Test circuits located on semiconductor die enable a tester to test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the plurality of die/ICs. The response patterns from the tester are input to the test circuits along with the output response of the die/IC to be compared. Also disclosed is the use of a response signal encoding scheme whereby the tester transmits response test commands to the test circuits, using a single signal per test circuit, to perform: (1) a compare die/IC output against an expected logic high, (2) a compare die/IC output against an expected logic low, and (3) a mask compare operation. The use of the signal encoding scheme allows functional testing of die and ICs since all response test commands (i.e. 1-3 above) required at each die/IC output can be transmitted to each die/IC output using only a single tester signal connection per die/IC output. In addition to functional testing, scan testing of die and ICs is also possible.
REFERENCES:
patent: 6483758 (2002-11-01), Kim et al.
patent: 6717429 (2004-04-01), Whetsel
Hales Alan
Whetsel Lee D.
Bassuk Lawrence J.
Brady W. James
Smoot Stephen W
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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