IC with comparator receiving expected and mask data from pads

Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure

Reexamination Certificate

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C324S765010

Reexamination Certificate

active

06894308

ABSTRACT:
Test circuits located on semiconductor die enable a tester to scan test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the plurality of die/ICs. The response patterns from the tester are input to the test circuits along with the output response of the die/IC to be compared. Also disclosed is the use of a response signal scheme whereby the tester transmits response test commands to the test circuits, using an expected data signal on one output pad and a mask data signal on another pad, to perform: (1) a compare die/IC output against an expected logic high, (2) a compare die/IC output against an expected logic low, and (3) a mask compare operation. The use of the signal scheme provides scan testing of die and ICs.

REFERENCES:
patent: 6483758 (2002-11-01), Kim et al.
patent: 6717429 (2004-04-01), Whetsel
patent: 2000090692 (2000-03-01), None

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