IC package having a single wiring sheet with a lead pattern disp

Details IC package having a single wiring sheet with a lead pattern disp IC package having a single wiring sheet with a lead pattern disp

1997-04-29

1999-10-26

Clark, Sheila V.

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

257693, 257696, 257706, H01L 2348, H01L 2352

Patent

active

059733950

ABSTRACT:
An IC package is provided that has a flexible wiring sheet, including an upper portion, a lower portion and a side portion which is wound around a base member over an upper surface, side surfaces and a lower surface of the base member. An IC is loaded on an upper surface of the upper flexible wiring sheet covering the upper surface of the base member. The IC is connected to an electrode provided on an upper lead pattern portion laid along the upper surface of the flexible wiring sheet. The lead pattern is extended from the upper flexible wiring sheet to the lower flexible wiring sheet via the side surfaces of the flexible wiring sheet covering side surfaces of the base member. An electrode to be connected with an object is arranged on the lower lead pattern portion which is formed on the lower flexible wiring sheet, and overall the IC or an IC connection portion is sealed on the upper surface of the upper flexible wiring sheet.

REFERENCES:
patent: 3641401 (1972-02-01), Lynch
patent: 3838443 (1974-09-01), Laighton
patent: 3908186 (1975-09-01), Anazawa et al.
patent: 3930115 (1975-12-01), Uden et al.
patent: 4376287 (1983-03-01), Sechi
patent: 5049978 (1991-09-01), Bates et al.
patent: 5081520 (1992-01-01), Yoshii et al.
patent: 5198886 (1993-03-01), Verspeak
patent: 5362656 (1994-11-01), McMahon
patent: 5450283 (1995-09-01), Lin et al.
patent: 5528458 (1996-06-01), Yasuho et al.
patent: 5581122 (1996-12-01), Chao et al.

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