Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
Reexamination Certificate
2007-01-09
2007-01-09
Lamarre, Guy (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Transmission facility testing
C714S025000, C714S031000, C714S737000, C324S765010
Reexamination Certificate
active
10005263
ABSTRACT:
A method and mechanism for detecting interconnect and bridge defects. Contact points in a chip are assigned placement designation such that no two adjacent points have the same designation. A transmitter, receiver, and optional transmitter/receiver test are then run. During the transmitter test, transmitters with a given designation drive a particular test pattern while other transmitters drive a different test pattern. Receivers compare received test patterns against expected patterns. During a receiver test, transmitters drive a test pattern corresponding to the placement designation of the receivers to which they are coupled. During a particular receiver test, transmitters coupled to receivers of a given designation drive a particular stream, while other transmitters drive a different stream. Receivers then compare received streams against an expected stream. Finally, the placement designation of a transmitter or receiver of an adjacent transmitter/receiver pair may be temporarily assigned an alternate designation. A transmitter or receiver test is then run and receivers check received test patterns against expected patterns.
REFERENCES:
patent: 5969538 (1999-10-01), Whetsel
patent: 6018810 (2000-01-01), Olarig
patent: 6029261 (2000-02-01), Hartmann
patent: 6219811 (2001-04-01), Gruetzner et al.
patent: 6505317 (2003-01-01), Smith et al.
Lamarre Guy
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Rankin Rory D.
Sun Microsystems Inc.
Tabone, Jr. John J.
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