Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-04-27
2009-06-02
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
07543261
ABSTRACT:
A method of operation for an input/output assignment tool is disclosed. The method generally includes the steps of (A) generating a graphic presentation to a user displaying (i) a circuit icon having a plurality of pin icons and (ii) a plurality of signal icons, (B) moving a first of the signal icons within the graphic presentation to a first of the pin icons in response to a move command from the user and (C) indicating an acceptance of an association between the first signal icon and the first pin icon in response to the association passing a rule.
REFERENCES:
patent: 6063132 (2000-05-01), DeCamp et al.
patent: 7076751 (2006-07-01), Nixon et al.
patent: 7100139 (2006-08-01), Anderson et al.
patent: 2005/0188336 (2005-08-01), Mortensen et al.
patent: 2006/0075372 (2006-04-01), Gryba
Asson David
He Ying Chun
Lindberg Grant
Martin Gregor J.
Chiang Jack
LSI Corporation
Maiorana PC Christopher P.
Memula Suresh
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