Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1999-03-04
2002-04-09
Gulakowski, Randy (Department: 1746)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C038S098000, C216S067000, C216S074000, C216S075000
Reexamination Certificate
active
06368978
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention pertains to a hydrogen-free method for the plasma etching of indium tin oxide (ITO).
2. Brief Description of the Background Art
Indium tin oxide is a material having electro-optical properties which are useful in electronic devices. Various methods for etching indium tin oxide are described, for example, in U.S. Pat. No. 5,286,337, to Tsou; U.S. Pat. No. 5,318,664, to Saia et al.; U.S. Pat. No. 5,607,602, to Su et al.; U.S. Pat. No. 5,667,631, to Holland et al.; and U.K. Patent Application No. GB 2,283,461, of Kretschmer et al.
Most prior art methods for etching indium tin oxide involve the use of a hydrogen-containing etchant gas, such as hydrogen bromide (HBr). However, certain materials that may be present in semiconductor devices are adversely affected by the presence of hydrogen. It would therefore be desirable to provide an essentially hydrogen-free method for etching indium tin oxide.
SUMMARY OF THE INVENTION
We have discovered that particular semiconductor devices which include N- or P-doped silicon at device locations which would be exposed during etching of the indium tin oxide are harmed by the use of a hydrogen-containing etchant material. An example of such a device is illustrated in FIG.
2
.
FIG. 2
shows a film stack for a CMOS device which comprises the following layers, from top to bottom: photoresist mask,
202
; indium tin oxide,
204
; P-type silicon,
206
; I-type (i.e., undoped) silicon,
208
; N-type silicon,
210
; titanium barrier/wetting layer,
212
; and aluminum/copper alloy,
214
; all deposited upon a silicon substrate,
216
. The film stack is patterned using a commercially available photoresist masking material. To form the CMOS device, it is necessary to etch through the indium tin oxide layer
204
and the amorphous silicon layers, including the P-type silicon layer
206
, the I-type silicon layer
208
, and the N-type silicon layer
210
.
As described above, commonly used processes for etching indium tin oxide involve the use of HBr as the primary etchant gas. However, overetch during the indium tin oxide etch step often extends into the I-type silicon layer
206
. The use of HBr, or any other hydrogen-containing gas, during the indium tin oxide etch causes damage to the P-type silicon layer which is exposed during overetch of the indium tin oxide layer. As such, hydrogen is not well tolerated during the indium tin oxide etching process.
The present invention provides a hydrogen-free method for the plasma etching of indium tin oxide. The etching method is preferably carried out at low temperatures (i.e., about 100° C. or lower), so that the properties of the CMOS device are not degraded.
The method comprises exposing indium tin oxide to a plasma generated from an etchant gas which contains no hydrogen. Chlorine is a major constituent of the etchant gas, comprising at least 20 atomic % and, preferably, at least 50 atomic %, of the etchant gas. The chlorine-comprising gas is preferably Cl
2
.
The etchant gas preferably further comprises a non-reactive gas which is selected from the group consisting of argon, xenon, krypton, and combinations thereof, and is most preferably argon.
The etchant gas may further include a diluent gas, such as nitrogen.
The etchant gas composition preferably comprises Cl
2
and argon in a volumetric flow rate ratio within the range of about 1:2 to about 1:0; more preferably, within the range of about 1:1 to about 1.5:1; most preferably, approximately 1:1.
The plasma is preferably a high density plasma having an ion density of at least about 10
11
e
−
/cm
3
, most preferably, within the range of about 10
11
e
−
/cm
3
to about 10
12
e
−
/cm
3
. The process chamber pressure is preferably within the range of about 2 mT to about 50 mT. The substrate temperature is preferably within the range of about 50° C. to about 90° C. The chamber wall temperature is preferably within the range of about 65° C. to about 80° C.
The present invention provides a clean, fast (i.e., greater than about 1200 Å per minute) method for etching indium tin oxide. This compares with a typical etch rate of about 900 Å per minute or less using prior art methods which utilize HBr as the principal etchant gas. The method of the invention also results in less byproduct deposition than methods utilizing HBr, because the byproducts of chlorine-based etch tend to be more volatile (and, therefore, more easily removed from the processing chamber) than those produced during a bromine-based etch.
REFERENCES:
patent: 5114872 (1992-05-01), Roselle et al.
patent: 5230771 (1993-07-01), Roselle
patent: 5286337 (1994-02-01), Tsou
patent: 5318664 (1994-06-01), Saia et al.
patent: 5607602 (1997-03-01), Su et al.
patent: 5607731 (1997-03-01), Haynes
patent: 5667631 (1997-09-01), Holland et al.
patent: 5723366 (1998-03-01), Suzuki et al.
patent: 5980686 (1999-11-01), Goto
patent: 6008065 (1999-12-01), Lee et al.
patent: 6036876 (2000-03-01), Chen et al.
patent: 6051150 (2000-04-01), Miyakawa
patent: 2283461 (1995-05-01), None
J. Molloy et al., “The Reactive Ion Etching of Transparent Electrodes for Flat Panel Displays Using Ar/CI2 Plasmas,” J. Electrochem Soc., vol. 142, No. 12, (Dec. 1995), pp. 4285-4289.
Chinn Jeffrey D.
Kumar Ajay
Nallan Padmapani
Applied Materials Inc.
Bach Joseph
Church Shirley L.
Gulakowski Randy
Smetana Jiri
LandOfFree
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