Hybrid magnetoresistive random access memory (MRAM)...

Details Hybrid magnetoresistive random access memory (MRAM)... Hybrid magnetoresistive random access memory (MRAM)...

2006-04-04

2006-04-04

Dinh, Son T. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Magnetoresistive

C365S230030

Reexamination Certificate

active

07023726

ABSTRACT:
The present invention relates to a hybrid MRAM architecture, and more particularly to a hybrid MRAM architecture capable of being used with an MCU and an MPU. This hybrid MRAM architecture is adapted to a controlling device for accessing a bit of information, comprising a plurality of first MRAM arrays (1T1MTJ architecture), a plurality of second MRAM arrays (XPC architecture), an address line, an access decoder, a sensing and writing circuit, and at least one I/O bus. The access decoder accesses to the bit of information from either the first or the second MRAM arrays selected in accordance with an address signal from the controlling device. The sensing and writing circuit amplifies the bit of information and transmits it to the controlling device via the at least one I/O bus. Accordingly, the access of the bit of information is completed.

REFERENCES:
patent: 6778445 (2004-08-01), Ooishi et al.
patent: 6816431 (2004-11-01), Lu et al.

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