HVNMOS structure for reducing on-resistance and preventing...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE27072, C438S170000

Reexamination Certificate

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07893490

ABSTRACT:
A high-voltage metal-oxide-semiconductor (HVMOS) device and methods for forming the same are provided. The HVMOS device includes a substrate; a first high-voltage n-well (HVNW) region buried in the substrate; a p-type buried layer (PBL) horizontally adjoining the first HVNW region; a second HVNW region on the first HVNW region; a high-voltage p-well (HVPW) region over the PBL; an insulating region at a top surface of the second HVNW region; a gate dielectric extending from over the HVPW region to over the second HVNW region, wherein the gate dielectric has a portion over the insulating region; and a gate electrode on the gate dielectric.

REFERENCES:
patent: 5227654 (1993-07-01), Momose et al.
patent: 5889315 (1999-03-01), Farrenkopf et al.
patent: 6770951 (2004-08-01), Huang et al.

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