Electrical computers and digital data processing systems: input/ – Input/output data processing – Concurrent input/output processing and data transfer
Patent
1998-06-02
2000-05-30
Lee, Thomas C.
Electrical computers and digital data processing systems: input/
Input/output data processing
Concurrent input/output processing and data transfer
710 4, 710 20, 710 21, 710 52, 395275, G06F 1300
Patent
active
060702001
ABSTRACT:
A host adapter has receive and transmit data paths, each of which includes a buffer (formed of storage elements) for temporarily holding the data being transferred by the host adapter. The host adapter uses each of the two buffers for storing only the data being transferred in the respective direction, each independent of the other, for full-duplex data transfer therethrough. To permit parallel flow-through operation, each of the two buffers is organized into a number of fixed-sized pages that are accessible via the peripheral bus only one page at a time. To maximize bandwidth and minimize latency, during operation in any given direction of data transfer (e.g. from the computer bus to the peripheral bus or vice versa) the host adapter uses at least two pages in a data path simultaneously: one for receipt and another for transmission. Specifically, each data path uses one page to hold data that is currently being received, while using another page containing data that was previously received for simultaneous transmission from the host adapter. Each of the data paths transfers data in a continuous manner irrespective of the context (e.g. peripheral device address, or system memory address or a sequence identifier of a Fibre Channel frame) of the data. Specifically, each data path uses one page to hold data that is currently being received from one context, while using another page containing data of another context that was previously received for simultaneous transmission from the host adapter.
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Gates Stillman F.
Suri Salil
Adaptec, Inc.
Cao Chun
Lee Thomas C.
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