Highly reliable gate oxide and method of fabrication

Details Highly reliable gate oxide and method of fabrication Highly reliable gate oxide and method of fabrication

2002-02-11

2003-12-09

Niebling, John F. (Department: 2812)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S403000, C257S411000

Reexamination Certificate

active

06661058

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates generally to semiconductor devices and, in particular, to ultra-thin gate oxide memory devices.
BRIEF SUMMARY OF THE INVENTION
A conventional metal-oxide-semiconductor (MOS) device is illustrated in FIG.
1
. The device generally includes a gate electrode
20
which acts as a conductor to which an input signal is typically applied via a gate terminal (not shown). Conventionally. doped active areas
14
and
16
are formed within the semiconductor substrate
10
and act as source and drain regions
14
and
16
, respectively. A channel region
12
is formed in the semiconductor substrate
10
beneath the gate electrode
20
and separates the source/drain regions
14
,
16
. The channel region
12
is typically doped with a dopant opposite to that of the doped source/drain regions
14
,
16
. The gate electrode
20
is separated from the semiconductor substrate
10
by an insulating gate oxide layer
18
, which is typically an oxide of silicon, for example silicon dioxide (SiO
2
). The gate oxide layer
18
prevents current from flowing between the gate electrode
20
and the semiconductor source region
14
, the drain region
16
and/or the channel region
12
.
When an input voltage is applied to the gate electrode
20
, a transverse electrical field is set up in the channel region
12
. By varying the transverse electrical field, the conductance of the channel region
12
between the source region
14
and the drain region
16
is modulated. This way, an electric field controls the current flow through the channel region
12
. This type of device is commonly known as an MOS field-effect-transistor (MOSFET).
The growth of the gate oxide layer, such as the gate oxide layer
18
of
FIG. 1
, is a critical step in manufacturing miniaturized semiconductor devices. Thin gate oxide layers free of defects and of high quality without contamination are essential for proper device operation, especially when current design rules demand gate oxide layers with thicknesses of less than 15 Angstroms, and even less than 10 Angstroms. To obtain high-quality gate oxide layers, the surface of the active area of the device is typically treated with a wet etch to remove any residual oxide. The gate oxide is then grown slowly, typically through dry oxidation in a chlorine ambient. At this point, it is extremely important to carefully control the growth of the gate oxide because the thickness and uniformity of the gate oxide layer can significantly impact the overall operation of the device formed. Because the drain current in a MOS device is inversely proportional to the thickness of the gate oxide, it is desirable to make the gate oxide as thin as possible while taking into account the oxide breakdown and reliability considerations of the process. Furthermore, the use of silicon dioxide for gate oxide layers thinner than 20 Angstroms poses various problems, one of them being the leakage current caused by direct tunneling, which further affects the operation of the device.
High-dielectric constant insulating materials have been proposed as gate oxide layers, but with limited results.
FIG. 2
illustrates a high-dielectric constant insulating layer
19
formed between the gate electrode
20
and the semiconductor substrate
10
. Conventional high-dielectric constant insulating materials such as tantalum oxide (Ta
2
O
5
), titanium oxide (TiO
2
) or barium oxide (BaO), for example, are not thermally stable when in direct contact with a silicon substrate. Accordingly, these high-dielectric constant insulating materials require a diffusion barrier layer
21
(
FIG. 2
) at the interface with the silicon substrate, the formation of which adds process complexity.
Furthermore, using a diffusion barrier layer defeats the purposes of using a high-dielectric constant insulating material because the gate capacitance is decreased rather than increased. If the gate structure of
FIG. 2
is viewed as a series of stacked capacitors
25
(FIG.
3
), which has layers of thicknesses comparable to those of the gate structure of
FIG. 2
, then, a first capacitor C
1
(
FIG. 3
) corresponds to the high-dielectric constant insulating layer
19
and a second capacitor C
2
(
FIG. 3
) corresponds to the diffusion barrier layer
21
. The diffusion barrier layer
21
(
FIG. 2
) acts as a series capacitor the addition of which decreases the capacitance of the gate electrode
20
. The capacitance of the first capacitor C
1
is larger than the capacitance of the second capacitor C
2
and, thus, voltage V
1
which occurs across the first capacitor C
1
is smaller than voltage V
2
which occurs across the second capacitor C
2
. As a result, the applied voltage V that occurs across the series capacitors
25
, that is the sum of V
1
and V
2
, appears mostly across the diffusion barrier layer
21
rather than across the high-dielectric constant insulating layer
19
.
Accordingly, there is a need for an improved memory device which eliminates the problems posed by the use of a conventional high-dielectric constant insulating materials as gate oxide layers. There is also a need for an improved ultrathin gate oxide layer which is thermally stable when in contact with silicon and which is resistive to impurity diffusion, and a novel method for its fabrication. A memory device with a minimal voltage drop across the gate electrode is also desirable, as well as a method of forming such a memory device.
SUMMARY OF THE INVENTION
The present invention provides an ultra-thin gate oxide layer of hafnium oxide (HfO
2
) as a thin medium-dielectric constant gate insulating layer. The ultra-thin gate oxide layer of hafnium oxide (HfO
2
) is formed by a two-step process: (1) a thin hafnium (Hf) film is formed by thermal evaporation at a low substrate temperature, after which (2) the thin hafnium film is radically oxidized using a krypton/oxygen (Kr/o
2
) high-density plasma to form the ultra-thin gate oxide layer of hafnium oxide (HfO
2
). The ultra-thin gate oxide layer of hafnium oxide (HfO
2
) formed by the method of the present invention is thermally stable in contact with silicon and is resistive to impurity diffusion at the HfO
2
/silicon interface. The formation of the ultra-thin gate oxide layer of hafnium oxide (HfO
2
) eliminates the need for a diffusion barrier layer, allows thickness uniformity of the field oxide on the isolation regions and, more importantly, preserves the atomically smooth surface of the silicon substrate.


REFERENCES:
patent: 6087243 (2000-07-01), Wang
patent: 6153538 (2000-11-01), An
B. H. Lee, et al.—“Ultrathin Hafnium Oxide with Low Leakage and Excellent Reliability for Alternative Gate Dielectric Application,” IEEE 1999, pp. 133-136.
“High-Density Silicon Oxide Grown at Low-Temperature by Atomic Oxygen Generated in High-Density Krypton Plasma” by Yuji Saito, et al, Extended Abstracts of the 1999 International Conference on Solid State Device and Materials, Tokyo, 1999, pp. 152-153*.
“Low-Temperature Growth of High-Integrity Silicon Oxide Films by Oxygen Radical Generated in High-Density Krypton Plasma” by Masaki Hirayama, et al, 1999 IEEE pp. 249-252*.
“Advantage of Radical Oxidation for Improving Reliability of Ultra-Thin Gate Oxide” by Yuji Saito, et al, 2000 IEEE, pp 176-177*.

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