Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-06-29
2002-06-04
Ghyka, Alexander G. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S668000, C438S685000, C427S255360, C427S255391, C427S585000
Reexamination Certificate
active
06399490
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to integrated circuit manufacture. In particular, the present invention relates to a process for depositing highly conformal titanium nitride films by chemical vapor deposition.
BACKGROUND OF THE INVENTION
Titanium nitride (TiN) is an important material, having a number of applications, in the processes used to manufacture integrated circuits (ICs). Thin-film TiN is widely used as a contact diffusion barrier in silicon ICs. Such use occurs because TiN behaves as an impermeable barrier to silicon and because the activation energy for the diffusion of other impurities into TiN is high (e.g., the activation energy for Cu diffusion into TiN thin films is 4.3 eV, whereas the normal value for diffusion of Cu into metals is only 1 to 2 eV). TiN prevents junction spiking failures that occur when a significant amount of metal diffuses into the silicon, creating a short circuit across the junction. TiN is also chemically and thermodynamically very stable: TiN exhibits one of the lowest electrical resistivities of the transition metal carbides, borides, or nitrides—all of which are chemically and thermally stable compounds.
In another application, TiN is used as an adhesion layer for blanket tungsten films. TiN is deposited after contacts or vias are cut in a dielectric layer. Typical dielectric materials are borophosphosilicate glass (BPSG), thermal oxide, and plasma-enhanced oxide and silicon nitride. Blanket tungsten is next deposited and etched back to form plugs that are coplanar with the top of the dielectric. Then aluminum is deposited and patterned to form the metal interconnection for the integrated circuit. This series of process steps is usually repeated to form three or four levels of metallization. A thin (e.g., 100 nm thick) adhesion layer of TiN is deposited before the tungsten is deposited because extremely poor adhesion exists between tungsten and the typical dielectric materials.
Due to its high conductivity, titanium nitride is also an attractive candidate for forming electrodes in highly dense and complicated structures such as deep trench and stacked capacitor structures. Highly conformal films with low resistivity are needed for advanced device structures with enhanced surface area, such as stacks with hemispherical grains, crowns with grains, deep trenches with grains, and the like. Thin-film TiN meets those needs.
In most applications, it is desired that thin films maintain a uniform thickness and freedom from cracks or voids. As thin films cross steps that occur on the surface of the underlying substrate, they may suffer unwanted deviations from the ideal, such as thinning or cracking. A measure of how well a film maintains its nominal thickness is expressed by the ratio of the minimum thickness of a film as it crosses a step, t
s
, to the nominal thickness of the film on flat regions, t
n
. This film property is referred to as the “step coverage” of the film, and is expressed as the percentage of the nominal thickness that occurs at the step: Step Coverage (%)=(t
s
/t
n
)×100%. Step coverage of 100% is ideal, but each process is normally specified by a lesser minimum value that is acceptable for a given application.
The height of the step and the aspect ratio of the feature being covered also determine the expected step coverage. The greater the height of the step or the greater the aspect ratio (i.e., the height-to-width ratio of a single step or the height-to-spacing ratio of two adjacent steps) of the step, the more difficult it is to cover the step without thinning of the film. Therefore, the worse the expected step coverage. As contact dimensions continue to shrink in microelectronic technology, and aspect ratios continue to increase, the formation of conformal contact layers, liners, barriers, and other structures becomes increasingly difficult.
TiN films may be formed by several different methods, including (1) sputtering titanium onto a substrate and then reacting in nitrogen or ammonia; (2) reactively sputtering titanium in a nitrogen atmosphere; and (3) chemical vapor deposition (CVD). The first two processes are physical and result in line-of-sight trajectories for the deposited material. As a result, coverage of the sidewalls and bottoms of high aspect ratio (i.e., aspect ratios greater than about 1:45) contacts is poor with respect to the top surface of the substrate.
The third process, CVD, deposits a thin film of material onto a substrate by reacting the constituent elements in gaseous phase. CVD processes are used to produce thin, single-crystal films called epitaxial films. CVD allows surface diffusion of the depositing material. The coverage on the sidewalls and bottoms of the high aspect ratio contacts is only equivalent to that on the top surface of the substrate for low aspect ratios. Moreover, for high aspect ratio structures, CVD produces films that have poor conformality with the trench sidewalls.
TiN films are typically formed using the CVD process by reaction of titanium tetrachloride (TiCl
4
) and ammonia (NH
3
) in a ratio range of one-to-less than five (1:<5). The two gases are delivered in separate gas lines and mixed in a reaction chamber. Two problems occur with conventional CVD of TiN from TiCl
4
at reaction rate limited temperatures. The first is the slow reaction rate, increasing deposition time. More important at these lower temperatures chlorine impurities remain in the deposited film. The chlorine impurities increase the resistance of the TiN film. In addition, the chlorine corrodes metals, especially aluminum, damaging the surface. U.S. Pat. No. 5,378,501 issued to Foster discloses deposition of a TiN film by CVD using TiCl
4
and NH
3
in a diluent at a temperature less than 550° C. Foster requires the use of special equipment, however, that minimizes the boundary layer thickness over the substrate.
Other deposition processes have their own disadvantages. U.S. Pat. No. 5,840,628 issued to Miyamoto discloses a plasma chemical vapor deposition process. Plasma is a partially ionized gas. To make plasma, a device excites a gas with high radio or microwave frequencies. The plasma then emits light, charged particles (ions and electrons), and neutral active components (atoms, excited molecules, and free radicals). These particles and components bombard substrates brought into the plasma environment. The plasma CVD process disclosed by Miyamoto requires two steps, rather than a single step.
Many solutions have been proposed for depositing TiN in low aspect ratio structures. For example, U.S. Pat. No. 5,918,149 is directed to depositing aluminum or aluminum alloy into small vias holes or trenches. The method of fabrication includes the provision of a trench or via hole in a dielectric, with a barrier layer extending into the trench or via hole. A layer of titanium is provided over the barrier layer, also extending into the trench or via hole, and aluminum or aluminum alloy is provided over the titanium layer. The barrier layer provides good conformal coverage while also preventing outgassing of the dielectric from adversely affecting the conductor. The method includes the following specific steps: (1) providing an oxide dielectric, having a recess, on a wafer; (2) heating the surface of the wafer; (3) depositing a barrier layer of TiN in the recess by a CVD process in which a TiN source material is decomposed into TiN by the heated surface of the wafer; (4) depositing a titanium layer in the recess over the barrier layer, the titanium layer deposited by a physical vapor deposition process to a thickness of less than 200Å; (5) depositing an aluminum seed layer at room temperature in the recess over the titanium layer, wherein the seed layer is between 2,000 and 4,000 Å thick; (6) heating the wafer to 425° C. or less; and (7) depositing a second aluminum layer over the seed layer.
Another example of a solution proposed for low aspect ratio structures is provided by U.S. Pat. No. 5,192,589. Disclosed is a process for creating thin TiN films via CVD.
Faltermeier Cheryl G.
Jammy Rajarao
Schroeder Uwe
Wong Kwong Hon
Ghyka Alexander G.
Ratner & Prestia
Schnurmann H. Daniel
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