Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2001-09-26
2003-06-03
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S594000, C438S585000
Reexamination Certificate
active
06573169
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention concerns fabrication methods and structures for integrated circuits, particularly methods and structures for field-effect transistors.
Integrated circuits, the key components in thousands of electronic and computer products, are interconnected networks of electrical components fabricated on a common foundation, or substrate. Fabricators typically use various techniques, such as layering, doping, masking, and etching, to build thousands and even millions of microscopic resistors, transistors, and other electrical components on a silicon substrate, known as a wafer. The components are then “wired,” or interconnected, together to define a specific electric circuit, such as a computer memory or microprocessor.
Many integrated circuits include a common type of transistor known as a metal-oxide-semiconductor, field-effect transistor, or “mosfet” for short. A mosfet has four electrodes, or contacts—specifically, a gate, source, drain, and body—which connect to other transistors or components to form a circuit. In digital integrated circuits, such as logic circuits, memories, and microprocessors which operate with electrical signals representing ones and zeroes, each mosfet behaves primarily as a switch, with its gate serving to open and close a channel connecting its source and drain. Closing the switch requires applying a certain threshold voltage to the gate, and opening it requires either decreasing or increasing the gate voltage relative the threshold voltage, depending on whether the channel is made of negatively or positively doped semiconductive material.
One class of mosfet problems concerns the structure and composition of its gate. The gates of early mosfets were formed from a two-layer structure comprising a top aluminum layer and an underlying insulative layer, which separates and thus isolates the aluminum from its underlying semiconductive channel. This structure was a problem not only because the aluminum diffused through the underlying insulative layer and destroyed isolation between the gate and underlying channel, but also because the low-melting temperature of aluminum conflicted with high-temperature baking, or annealing, steps necessary to properly form a drain and source in alignment with the gate. Thus, for better reliability and superior drains and sources, contemporary mosfets have gates made, not from aluminum nor any other metal, but from polycrystalline silicon, sometimes called “polysilicon” or simply, “poly.”
Polysilicon, which has a multi-crystalline structure instead of the single-crystalline structure of silicon wafers, can be altered through doping, a process of adding impurities, to act as a conductor, similar to aluminum but unfortunately with about ten-times more electrical resistance. This higher resistance can be ameliorated some by silicidation, a process of coating and reacting polysilicon with a salicide-forming refractory metal. But, the higher resistance of even the salicided polysilicon gates combines with inherent integrated-circuit capacitances to cause significant delays in conducting signals from one circuit point to another, ultimately limiting how fast integrated circuits operate.
In response, several efforts have been made to form gates from materials less-resistive than polysilicon or polysilicon salicides. For example, D. H. Lee and coworkers have proposed making gates from tungsten (W) and titanium nitride (TiN). (See “Gate Oxide Integrity (GOI) of MOS Transistors with W/TiN Stacked Gate,” Symposium on VLSI Technology, Honolulu, pp. 208-209, 1996.) In addition, a team led by J. M. Hwang has proposed a gate consisting of stacked layers of polysilicon and titanium nitride. (See “Novel Polysilicon/TiN Stacked-Gate Structure for Fully-Depleted SOI/CMOS,” Digest IEEE International Electron Devices Meeting, San Francisco, pp. 345-348, 1992.) Similarly, another group, headed by S. L. Wu, has proposed a gate structure consisting of stacked-amorphous-silicon film. (See “Suppression of the Boron Penetration Induced Si/SiO
2
Interface Degradation by Using a Stacked-Amorphous-Silicon Film as the Gate Structure for Pmosfet,” IEEE Electron Device Letters, vol. 15, no. 5, pp 160-162, May 1994.)
However, each of these efforts has failed to yield a practical solution. In particular, the electrical properties of the materials in these proposed gate structures, namely tungsten and titanium nitride, limit how low mosfet threshold voltages can be set, and thus pose a barrier to low-voltage operation, a necessity for increasing battery-life in portable computers, telephones, etc. Moreover, the electrical resistance of tungsten and titanium nitride is at least twice that of metals such as aluminum, gold, or silver.
Therefore, there remains a need not only for mosfets with lower-resistance gate structures, but also for suitable methods of making them.
SUMMARY OF THE INVENTION
To address these and other needs, the inventors developed low-resistance metal gate structures for field-effect transistors, and methods for making these structures. Specifically, one embodiment of the gate structure includes an aluminum, gold, or silver top layer to reduce gate resistance, a middle diffusion barrier layer to improve reliability, and a doped polysilicon bottom layer to facilitate low-voltage operation. Thus, the gate structure overcomes several drawbacks of both early metal gates and conventional polysilicon gates.
One method for making the low-resistance gate structure entails forming a gate insulation layer on a semiconductive channel region, forming a polysilicon structure on the gate insulation layer, and then substituting metal, preferably aluminum, gold, or silver, for at least a portion of the polysilicon structure to form the gate. In the preferred embodiment, the metal substitution involves depositing a metal layer on the polysilicon structure and then heating it and the polysilicon structure to urge cross-diffusion of the metal and polysilicon. In still other embodiments, the method includes implanting source and drain regions before depositing the metal layer, and thereby eliminates the temperature conflicts that prevented the use of metals, such as aluminum, with conventional source and drain self-alignment techniques.
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Forbes Leonard
Noble Wendell P.
Lindsay Jr. Walter L.
Micro)n Technology, Inc.
Niebling John F.
Schwegman Lundberg Woessner & Kluth P.A.
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