Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-02-23
2001-02-27
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S586000, C438S639000
Reexamination Certificate
active
06194261
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to semiconductors, and more particularly to a semiconductor device and a method of fabricating the same so that the yield of such semiconductor devices is improved.
2. Description of the Related Art
In known semiconductor devices where a laminated structure of an insulating layer and a conductive layer is formed on a first semiconductor body, spacers are provided on sidewalls of the laminated structure and a diffusion layer is then formed in the first semiconductor body so that one edge of the diffusion layer is adjacent to one of the spacers. A second semiconductor body is formed and a shared contact hole is then created in the second semiconductor body for establishing an ohmic contact between the diffusion layer and the conductive layer. It is the usual practice to position the shared contact hole so that its vertical center axis is aligned with the edge of the conductive layer.
However, the yield of the prior art semiconductor devices is low due to device failures revealed at the inspection stage of manufacture.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to increase the yield of semiconductor devices.
The present invention is based on a discovery that the hole contact resistance that varies as a function of distance from the center axis of the hole is asymmetric with respect to that axis.
According to a first aspect of the present invention, there is provided a semiconductor device comprising a first semiconductor body, a diffusion layer in the first semiconductor body, a laminated structure of an insulating layer on the first semiconductor body adjacent to the diffusion layer and a conductive layer on the insulating layer, an insulating spacer on a sidewall of the laminated structure, the spacer having a width W, and a second semiconductor body having a shared contact hole for establishing an ohmic contact between the diffusion layer and the conductive layer, the shared contact hole having a center axis located a distance W/
2
from an edge of the conductive layer so that portions of the diffusion layer and the conductive layer which are exposed to the outside through the shared contact hole have substantially equal areas.
According to a second aspect, the present invention provides a semiconductor device comprising a first semiconductor body, a diffusion layer in the first semiconductor body, a laminated structure of an insulating layer on the first semiconductor body adjacent to the diffusion layer, a polysilicon layer on the insulating layer and a first silicide layer on the polysilicon layer, an insulating spacer on a sidewall of the laminated structure, a second silicide layer in the diffusion layer, the second silicide layer having an edge spaced from an edge of the laminated structure by an amount equal to a width of the spacer, and a second semiconductor body having a shared contact hole for establishing an ohmic contact between the first and second silicide layers, the shared contact hole having a center axis located at equal distances from the edges of the first and second silicide layers so that portions of the first and second silicide layers which are exposed to the outside through the shared contact hole have substantially equal areas.
According to a third aspect, the present invention provides a method for fabricating a semiconductor device, comprising the steps of forming a first semiconductor body, forming a laminated structure of an insulating layer on the first semiconductor body and a conductive layer on the insulating layer, forming insulating spacers on sidewalls of the laminated structure, each of the spacers having a width W, forming a diffusion layer in the first semiconductor body so that an edge of the diffusion layer is adjacent to one of the spacers, forming a second semiconductor body, and forming a shared contact hole in second semiconductor body for establishing an ohmic contact between diffusion layer and conductive layer, a center axis of the shared contact hole being located a distance W/
2
from an edge of laminated structure so that portions of diffusion layer and conductive layer which are exposed to the outside through shared contact hole have substantially equal areas.
According to a fourth aspect, the present invention provides a method for fabricating a semiconductor device, comprising the steps of forming a first semiconductor body, forming a laminated structure of an insulating layer on the first semiconductor body, a polysilicon layer on the insulating layer and a first silicide layer on the polysilicon layer, forming insulating spacers on sidewalls of the laminated structure, forming a diffusion layer in the first semiconductor body so that an edge of the diffusion layer is adjacent to one of the spacers, forming a second silicide layer in the diffusion layer so that an edge of the second silicide layer is adjacent to one of the spacers, forming a second semiconductor body, and forming a shared contact hole in the second semiconductor body for establishing an ohmic contact between the first and second silicide layers, a center axis of the shared contact hole being located at equal distances from the edges of the first and second silicide layers so that portions of the diffusion layer and the conductive layer which are exposed to the outside through the shared contact hole have substantially equal areas.
REFERENCES:
patent: 5030584 (1991-07-01), Nakata
patent: 5600170 (1997-02-01), Sugiyama et al.
patent: 5705437 (1998-01-01), Wu et al.
patent: 5824579 (1998-10-01), Subramanian et al.
patent: 0 587 399 (1994-03-01), None
Chaudhari Chandra
NEC Corporation
Young & Thompson
LandOfFree
High yield semiconductor device and method of fabricating... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High yield semiconductor device and method of fabricating..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High yield semiconductor device and method of fabricating... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2586734