Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-08-03
1999-11-30
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438408, 257489, 257494, H01L 2972, H01L 2906
Patent
active
059941898
ABSTRACT:
An n.sup.- layer is formed on a main surface of a p-type semiconductor substrate. A p.sup.- diffusion region is formed at a surface of n.sup.- layer. A p diffusion region is formed contiguous to one end of p.sup.- diffusion region. A plurality of p diffusion regions containing p-type impurity the concentration of which is higher than that of p.sup.- diffusion region are formed in p.sup.- diffusion region. A p diffusion region is formed such that it is spaced apart from p.sup.- diffusion region. A gate electrode is formed on a surface of n.sup.- layer positioned between p diffusion region and p.sup.- diffusion region with an oxide film interposed. A drain electrode is formed in contact with a surface of p diffusion region. Furthermore, an n diffusion region is formed adjacent to p diffusion region, and a source electrode is formed in contact with both a surface of n diffusion region and a surface p diffusion region.
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Blum David S
Bowers Charles
Mitsubishi Denki & Kabushiki Kaisha
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