High-voltage transistor and fabrication process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S305000, C438S528000, C257S408000, C257SE21427, C257SE21059

Reexamination Certificate

active

07101764

ABSTRACT:
A high-voltage transistor and fabrication process in which the fabrication of the high-voltage transistor can be readily integrated into a conventional CMOS fabrication process. The high-voltage transistor of the invention includes a channel region formed beneath a portion of the gate electrode after the gate electrode has been formed on the surface of a semiconductor substrate. In a preferred embodiment, the channel region is formed by the angled ion implantation of dopant atoms using an edge of the gate electrode as a doping mask. The high-voltage transistor of the invention further includes a drain region that is spaced apart from the channel region by a portion of a well region and by an isolation region residing in the semiconductor substrate. By utilizing the process of the invention to fabricate the high-voltage transistor, the transistor can be integrated into an existing CMOS device with minimal allocation of additional substrate surface area.

REFERENCES:
patent: 5488244 (1996-01-01), Quek et al.
patent: 5512495 (1996-04-01), Mei et al.
patent: 5780341 (1998-07-01), Ogura
patent: 5786617 (1998-07-01), Merrill et al.
patent: 5896314 (1999-04-01), Chen
patent: 5904531 (1999-05-01), Liaw
patent: 5910670 (1999-06-01), Ludikhuize
patent: 5926706 (1999-07-01), Liaw et al.
patent: 6140189 (2000-10-01), Hsu et al.
patent: 6222235 (2001-04-01), Kojima et al.
patent: 6262459 (2001-07-01), Tung
patent: 6284603 (2001-09-01), Ho Simon et al.
patent: 6291325 (2001-09-01), Hsu
patent: 6372530 (2002-04-01), Lee
patent: 6383876 (2002-05-01), Son et al.
patent: 6384457 (2002-05-01), Tyagi et al.
patent: 6413823 (2002-07-01), Wu et al.
patent: 6518122 (2003-02-01), Chan et al.
patent: 6703659 (2004-03-01), Chan et al.
patent: 2002/0027822 (2002-03-01), Candelier et al.
Wolf and Tauber, Silicon Processing for the VLSI Era vol. I; Process Technology; p. 289; 1986 Lattice Press; Sunset Beach, CA.
Sze, “Physics of Semiconductor Devices,” Second Edition, John Wiley & Sons, pp. 98-103 (1981).
Baliga, Jayant, “Power Metal-Oxide-Semiconductor Field-Effect Transistors,”Modern Power Devices,pp. title page, copyright page and 264-266 (1987).
Ballan, Hussein and Michel Declercq, “MOSFET High-voltage technologies,”High Voltage Devices and Circuits in Standard CMOS Technologies,pp. title page, copyright page and 56-58 (1999).
Bassin, Cedric, Hussein Ballan and Michel Declercq, “High-Voltage Devices for o.5-μm Standard CMOS Technology,”IEEE Electron Device Letters,vol. 21, No. 1, pp. 40-42 (Jan. 2000).
Hori, Takashi, Junji Hirase, Yoshinori Odake and Takatoshi Yasui, Deep-Submicrometer Large-Angle-Tilt Implanted Drain (LATID) Technology,IEEE Electron Device Letters,vol. 39, No. 10, pp. 2312-2324 (Oct. 1992).
Wolf, “Silicon Processing for the VLSI Era”, Lattice Press, vol. 3, p. 591-592 (1995).

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