High-voltage MOS transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S341000, C257S408000

Reexamination Certificate

active

10801234

ABSTRACT:
A method for fabricating a high-voltage MOS transistor. A first doping region with a first dosage is formed in a substrate. A gate structure is formed overlying the substrate and partially covers the first doping region. The substrate is ion implanted using the gate structure as a mask to simultaneously form a second doping region with a second dosage within the first doping region to serve as a drain region and form a third doping region with the second dosage in the substrate to serve as a source region. A channel region is formed in the substrate between the first and third doping regions when the high-voltage MOS transistor is turned on to pass current between the source and drain regions, where a resistance per unit length of the channel region is substantially equal to that of the first doping region. A high-voltage MOS transistor is also disclosed.

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patent: 6297108 (2001-10-01), Chu
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patent: 2001/0012671 (2001-08-01), Hoshino et al.

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