Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-12-18
2007-12-18
Smith, Zandra V. (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S218000, C438S223000, C438S227000, C438S228000, C438S294000, C438S510000, C438S527000
Reexamination Certificate
active
11163987
ABSTRACT:
The present invention pertains to a high-voltage MOS device. The high-voltage MOS device includes a substrate, a first well, a first field oxide layer enclosing a drain region, a second field oxide enclosing a source region, and a third field oxide layer encompassing the first and second field layers with a device isolation region in between. A channel region is situated between the first and second field oxide layers. A gate oxide layer is provided on the channel region. A gate is stacked on the gate oxide layer. A device isolation diffusion layer is provided in the device isolation region.
REFERENCES:
patent: 5545577 (1996-08-01), Tada
patent: 6350641 (2002-02-01), Yang
patent: 7214591 (2007-05-01), Hsu
patent: 2006/0006461 (2006-01-01), Chidambaram
patent: 2006/0068538 (2006-03-01), Ogura
Au Bac H.
Hsu Winston
Smith Zandra V.
United Microelectronics Corp.
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