High voltage comparator

Details High voltage comparator High voltage comparator

1999-10-29

2001-03-27

Dinh, Son T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Including signal comparison

C365S185200, C365S210130, C365S226000

Reexamination Certificate

active

06208564

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates generally to semiconductor devices, and more particularly to a high voltage comparator for semiconductor devices, especially non-volatile semiconductor memory devices such as flash memory devices.
Generally, a flash memory device comprises an address sequencer, row and column decoders, sense amplifiers, write amplifiers, and a memory cell array. An example of a flash memory device is described in U.S. Pat. No. 5,490,107, the disclosure of which is herein incorporated by reference. The memory cell array contains a plurality of memory cells arranged in rows and columns. Each memory cell is capable of holding a single bit of information. A column of memory cells in the memory cell array is commonly coupled to a bit line. The column decoder along with the address sequencer selects a bit line. Similarly, the memory cells arranged in a row of the memory cell array are commonly coupled to a word line. The row decoder and address sequencer selects a word line. Together the row and column decoders and the address sequencer selects an individual memory cell or a group of memory cells.
The memory cells in the memory cell array of a flash memory device are generally grouped into sub-arrays called memory cell blocks. Each memory cell block is coupled to a sense amplifier and a write amplifier. The write amplifier (W/A) applies a set of predetermined voltages to store information in the selected memory cells. This action is referred to as a program or write operation. Similarly, a set of predetermined voltages applied to the selected memory cells allows information to be discriminated and retrieved by the sense amplifier (S/A). This action is referred to as a read operation.
During a write or program operation, a set of predetermined voltages, relatively high program voltage V
pp
, needs to be supplied by the decoder circuits to the memory cells. These predetermined voltages are generated independently and must achieve a specific operating voltage level before the memory cell is capable of being programmed. Furthermore, these predetermined voltages are controlled independently of each other. Therefore, precise timing of when these predetermined voltages would be high enough, i.e. at a specific operating voltage level, to start programming the memory cell is difficult to determine, especially with the predetermined voltages being a higher voltage level than V
cc
, the voltage applied to the flash memory device. By knowing the precise timing of when the predetermined voltages are high enough to start programming the memory cell, the memory cells are capable of being programmed as quickly as possible.
SUMMARY OF THE INVENTION
The present invention provides a high voltage comparator. The high voltage comparator comprises a set of transistors to identify when a first voltage corresponds to a second voltage and the first and second voltages are larger then an operating voltage supplied to the high voltage comparator.
In another embodiment, a flash memory device is provided comprising a plurality of memory cells and a high voltage comparator. The high voltage comparator receives a plurality of high program voltages and generates an output signal when the plurality of high program voltages correspond to each other. The plurality of high program voltages are predetermined voltages for programing the plurality of memory cells.
Many of the attendant features of this invention will be more readily appreciated as the same becomes better understood by reference to the following detailed description and considered in connection with the accompanying drawings in which like reference symbols designate like parts throughout.


REFERENCES:
patent: 5841724 (1998-11-01), Ebel et al.
patent: 5999475 (1999-12-01), Futatsuya et al.
patent: 6067269 (2000-05-01), Han et al.

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