Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-01-10
2010-06-15
Dang, Phuc T (Department: 2892)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S301000, C438S305000, C257S369000, C257S408000
Reexamination Certificate
active
07736983
ABSTRACT:
Pipe defects in n-type lightly doped drain (NLDD) regions and n-type source/drain (NDS) regions are associated with arsenic implants, while excess diffusion in NLDD and NSD regions is mainly due to phosphorus interstitial movement. Carbon implantation is commonly used to reduce phosphorus diffusion in the NLDD, but contributes to gated diode leakage (GDL). In high threshold NMOS transistors GDL is commonly a dominant off-state leakage mechanism. This invention provides a method of forming an NMOS transistor in which no carbon is implanted into the NLDD, and the NSD is formed by a pre-amorphizing implant (PAI), a phosphorus implant and a carbon species implant. Use of carbon in the NDS allows a higher concentration of phosphorus, resulting in reduced series resistance and reduced pipe defects. An NMOS transistor with less than 1·1014cm−2arsenic in the NSD and a high threshold NMOS transistor formed with the inventive method are also disclosed.
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patent: 6013546 (2000-01-01), Gardner et al.
patent: 6720227 (2004-04-01), Kadosh et al.
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patent: 2006/0148220 (2006-07-01), Lindert et al.
Kohli Puneet
Mehrotra Manoj
Tang Shaoping
Brady III Wade J.
Dang Phuc T
Garner Jacqueline J.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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