High speed write technique for a memory

Details High speed write technique for a memory High speed write technique for a memory

1986-03-24

1988-08-16

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365230, G11C 700

Patent

active

047649003

ABSTRACT:
In a random access memory a write driver develops a full rail write signal which is coupled to the selected bit line pair via transmission gates. The bit lines are thus driven to full rail. This results in a faster rise time on the bit line which is driven to a logic high. With the faster rise time, the selected cell is written into more quickly with the result of a faster write time for the memory.

REFERENCES:
patent: 4616343 (1986-10-01), Ogawa
patent: 4618946 (1986-10-01), Little et al.
patent: 4642798 (1987-02-01), Rao

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