Static information storage and retrieval – Read/write circuit – Simultaneous operations
Patent
1998-10-08
1999-11-02
Nelms, David
Static information storage and retrieval
Read/write circuit
Simultaneous operations
36523005, 365154, 365156, 36518901, 365205, 365207, G11C 1604
Patent
active
059782790
ABSTRACT:
A high speed two-port Static Random Access Memory (SRAM) circuit with a write-through function includes a write-through unit receiving data signals DATA, DATAB outputted from a memory cell, carrying out a write-through operation, and outputting first to third signals S1, S2, S3, a data equalizer for equalizing the data signal DATA and the data bar signal DATAB in accordance with an externally generated data line equalizing signal DLEQ, a sense amplifier sensing the data signal DATA and the data bar signal DATAB and amplifying the sensed signals, a switching unit pre-amplifying the data signal DATA and the data bar signal DATAB received via the sense amplifier in accordance with an externally generated read enable signal RE and the first and second signals S1, S2 outputted from the write-through unit, and an output selection unit selecting the third signal S3 from the write-through unit or an output signal of the sense amplifier, in accordance with the first signal S1 outputted from the write-through unit. The circuit intensifies a data amplifying capacity by use of the sense amplifier in a normal operation mode, and when in a write-through operation mode, the sense amplifier is turned off to output the memory cell data and enable the write-through function, thereby obtaining a faster read access time.
REFERENCES:
patent: 5001671 (1991-03-01), Koo et al.
patent: 5062081 (1991-10-01), Runaldue
patent: 5463585 (1995-10-01), Sanada
patent: 5473574 (1995-12-01), Clemen et al.
patent: 5479374 (1995-12-01), Kobayashi et al.
LG Semicon Co. Ltd.
Nelms David
Yoha Connie C.
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