High speed RAM based data serializers

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

365230, 365221, 365239, 340799, G11C 700

Patent

active

048170542

ABSTRACT:
Multiple bit parallel data serializers are described for accessing data serially through a port at high video data rates. The serializer preferably comprises a buffer array for storing data at a plurality of SRAM memory locations, sense amplifiers for sensing the stored data, an address decoder for selecting a predetermined memory location of the buffer array for data access by the sense amplifiers, a data latch for the latched buffering of data prior to output to the serial port and a control gate for enabling the gated transfer of data between the sense amplifiers and the output latch.

REFERENCES:
patent: 4361869 (1982-11-01), Johnson et al.
patent: 4433394 (1984-02-01), Torii et al.
patent: 4685088 (1987-08-01), Iannucci

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