Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2011-02-22
2011-02-22
Le, Don P (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S087000
Reexamination Certificate
active
07893718
ABSTRACT:
High speed multiplexers include a first N-to-1 selection circuit, where N is an integer greater than one, a second N-to-1 selection circuit and an output driver. The first N-to-1 selection circuit is configured to route a true or complementary version of a selected first input signal (from amongst N input signals) to an output thereof in response to a first multi-bit selection signal, where N is an integer greater than one. The second N-to-1 selection circuit is configured to route a true or complementary version of the selected first input signal to an output thereof in response to a second multi-bit selection signal. The output driver includes a pull-up circuit, which is responsive to a signal generated at the output of the first N-to-1 selection circuit, and a pull-down circuit, which is responsive to a signal generated at the output of the second N-to-1 selection circuit.
REFERENCES:
patent: 5420529 (1995-05-01), Guay et al.
patent: 5969543 (1999-10-01), Erickson et al.
patent: 6236245 (2001-05-01), Papaliolios
patent: 7129755 (2006-10-01), Campbell
patent: 1020010047174 (2001-06-01), None
Choi Chang Jun
Jung Gun Ok
Kim Min Su
Lee Hoi Jin
Park Sung Bae
Le Don P
Myers Bigel & Sibley & Sajovec
Samsung Electronics Co,. Ltd.
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