Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-03-04
1999-08-03
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438273, 438520, H01L 218236, H01L 21265
Patent
active
059337346
ABSTRACT:
A high-speed MOS-technology power device integrated structure includes a plurality of elementary functional units formed in a lightly doped semiconductor layer of a first conductivity type, the elementary functional units including channel regions of a second conductivity type covered by a conductive insulated gate layer including a polysilicon layer; the conductive insulated gate layer also including a highly conductive layer superimposed over the polysilicon layer and having a resistivity much lower than the resistivity of the polysilicon layer, so that a resistance introduced by the polysilicon layer is shunted with a resistance introduced by the highly conductive layer and the overall resistivity of the insulated gate layer is lowered.
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Ferla Giuseppe
Frisina Ferruccio
Lebentritt Michael S.
Niebling John F.
SGS--Thomson Microelectronics S.r.l.
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