High speed analog compensated input buffer

Details High speed analog compensated input buffer High speed analog compensated input buffer

1998-01-23

2000-11-07

Tokar, Michael

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Signal level or switching threshold stabilization

326 33, 326 34, 327530, 327541, H03K 1716, H03K 19003

Patent

active

061442186

ABSTRACT:
An analog process/voltage/temperature (PVT) compensated buffer includes a differential amplifier providing a first output signal indicative of a difference between an input signal and a reference signal. The input signal is compatible with a first type of logic. An active gain stage is coupled to translate the first output signal to a second output signal. The second output signal is compatible with a second type of logic. The differential amplifier and the active gain stage are coupled to receive a process/voltage/temperature (PVT) compensation signal. In one embodiment, the first type of logic is Gunning Transceiver Logic (GTL) and the second type of logic is complementary metal oxide semiconductor (CMOS) logic.

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