High pin count and multi-layer wiring lead frame

Details High pin count and multi-layer wiring lead frame High pin count and multi-layer wiring lead frame

1991-06-06

1993-03-23

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

Small lead frame for connecting a large lead frame to a...

257666, 257691, H01L 2348, H01L 2312

Patent

active

051967251

ABSTRACT:
A high pin count and multi-layer lead frame according to the present invention which has a short pitch, high density lead pattern and at the same time, enhanced transmission characteristics for high-frequency signals includes at least one pair of conductive layers for grounding, power supply or both of them and one pair of insulating layers formed on these conductive layers, inner leads formed on the insulating layer on the top conductive layer by etching or vapor deposition in a short pitch, high density pattern, and outer leads made of metal frame. The inner leads are electrically connected to the leads for signals of the outer leads, the leads for grounding and power supply of the outer leads are connected to each of the conductive layers separately, and a plurality of holes for wire bonding the electrodes of a semiconductor element to each of the conductive layers are formed on each of the insulating layers.

REFERENCES:
patent: 4891687 (1990-01-01), Mallik et al.
patent: 4933741 (1990-06-01), Schroeder
patent: 4975761 (1990-12-01), Chu
patent: 5012386 (1991-04-01), McShane et al.
patent: 5049974 (1991-09-01), Nelson et al.
patent: 5067005 (1991-11-01), Michii et al.

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